7473PC datasheet, PDF - EEWORLD Datasheet

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7473PC: DescriptionJ-K Flip-Flop, 74 Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14, PLASTIC, DIP-14; Categorylogic logic; File Size77KB，3 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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7473PC Overview

J-K Flip-Flop, 74 Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14, PLASTIC, DIP-14

7473PC Parametric

Parameter Name	Attribute value
Maker	Fairchild
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknown
Other features	MASTER SLAVE OPERATION
series	74
JESD-30 code	R-PDIP-T14
Logic integrated circuit type	J-K FLIP-FLOP
Number of digits	2
Number of functions	2
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
propagation delay (tpd)	40 ns
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	NEGATIVE EDGE
minfmax	15 MHz

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7473PC Related Products

	7473PC	54LS73DM	5473DM	7473DC	74H73FC
Description	J-K Flip-Flop, 74 Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14, PLASTIC, DIP-14	J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP14, CERAMIC, DIP-14	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP14,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP14,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDFP14,
Reach Compliance Code	unknown	unknown	unknown	unknown	compliant
JESD-30 code	R-PDIP-T14	R-CDIP-T14	R-XDIP-T14	R-XDIP-T14	R-XDFP-F14
Logic integrated circuit type	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP
Number of functions	2	2	2	2	2
Number of terminals	14	14	14	14	14
Maximum operating temperature	70 °C	125 °C	125 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC	CERAMIC	CERAMIC
encapsulated code	DIP	DIP	DIP	DIP	DFP
Encapsulate equivalent code	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3	FL14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	FLATPACK
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	NO	NO	NO	NO	YES
technology	TTL	TTL	TTL	TTL	TTL
Temperature level	COMMERCIAL	MILITARY	MILITARY	COMMERCIAL	COMMERCIAL
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	FLAT
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Trigger type	NEGATIVE EDGE	NEGATIVE EDGE	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE
Maker	Fairchild	-	Fairchild	-	Fairchild
package instruction	DIP, DIP14,.3	DIP, DIP14,.3	-	DIP, DIP14,.3	DFP, FL14,.3
series	74	LS	TTL/H/L	-	-
Number of digits	2	2	2	-	-
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	-	-
power supply	5 V	5 V	5 V	5 V	-
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	-
Is it Rohs certified?	-	incompatible	incompatible	incompatible	incompatible
JESD-609 code	-	e0	e0	e0	e0
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	-	NOT SPECIFIED	250
Terminal surface	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Maximum time at peak reflow temperature	-	NOT SPECIFIED	-	NOT SPECIFIED	30
Base Number Matches	-	1	1	1	1

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