During behavior simulation, after double-clicking "generate expected simulation results", a warning appears: HDLParsers:3215 - Unit work/ee is now defined in a different file: was E:/study/verilog HDL...
[i=s]This post was last edited by 574433742 on 2016-2-26 08:08[/i] [font=微软雅黑][size=4]I found something interesting. Wow, come and guess what it is. . . PS: I am just a tinkerer, please don't laugh at...
I am a novice reading books and encountered a problem. I would like to ask for your advice. When I saw the transistor current source in the early days of op amps, I had a question. In the basic BJT mi...
[i=s]This post was last edited by paulhyde on 2014-9-15 09:38[/i] Are there any papers from previous electronic competitions here? Urgently needed! ! ! ! ! ! ! ! ! !...
root@ubuntu:~/workspace/s3c-linux.jyx# make ARCH=arm CROSS_COMPILE=arm-linux-zImange make: arm-linux-zImangegcc: command not found CHK include/linux/version.h CHK include/generated/utsrelease.h make[1...