Storage Temperature Range..............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow) ......................................+260°C
PACKAGE_THERMAL_CHARACTERISTICS_(Note_1)
TDFN
Junction-to-Ambient Thermal Resistance (q
JA
) ...........41°C/W
Junction-to-Case Thermal Resistance (q
JC
)..................8°C/W
SO
Junction-to-Ambient Thermal Resistance (q
JA
) ...........43°C/W
Junction-to-Case Thermal Resistance (q
JC
)..................7°C/W
Note_1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL_CHARACTERISTICS_
(V
IN
= V
ENABLE
= +14V, C
TIMEOUT
= open, C
IN
= 1µF, C
OUT
= 4.7µF, unless otherwise noted. T
A
= -40°C to +125°C, T
A
P
T
J
P
+150°C, unless otherwise noted. Typical values are T
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