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Comparison between H8S/2199 Series and
H8S/2199R Series
Item
OSD
Initialization
mode of bits 12
and 11 in the
OSD format
register
(DFORM)
Character
display size at
vertical 2 times
x horizontal 2
times
4/2fsc clock in
superimposed
mode
Horizontal
display output
mask area in
superimposed
mode
Initialized by a reset, or in
module stop mode, sleep
mode, standby mode,
watch mode, subactive
mode, or subsleep mode.
Number of characters in
a row is 16
Initialized by a reset.
When rewriting bits 12
and 11, make sure the
module stop bit in the
sync separator is not
cleared to 0.
Number of characters in
a row is 32
Bit 12: FSCIN (4/2fsc
input select bit)
Bit 11: FSCEXT (4/2fsc
external input select bit)
H8S/2199 Series
H8S/2199R Series
Remarks
Necessary
Unnecessary
H reference face
CVin
AFCH
(internal sync H)
H display output
mask area
Approx. 3.0µs Approx. 8.0µs
CVin
AFCH
(internal sync H)
H display output
mask area
H reference face
Approx. 4.0µs Approx. 7.0µs
Vertical display
output mask
area in
superimposed
mode
NTSC, 4.43 NTSC, and
MPAL: 16 lines after
external Vsync is
detected
PAL, SECAM, and
NPAL: 21 lines after
external Vsync is
detected
NTSC, 4.43 NTSC, and
MPAL: 6 lines after
external Vsync is
detected
PAL, SECAM, and NPAL:
6 lines after external
Vsync is detected
Horizontal
starting display
position when
HCKSEL = 1
Compared to when
Same position as when
HCKSEL = 0, shifted left HCKSEL = 0
by approx. 1.7
µs
if AFC
= 9 MHz, and by approx.
1.1
µs
if AFC = 7 MHz
Rev. 1.0, 01/01, page I of IV
Microcontroller MCU
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