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Preface
The SH7014/16/17 CMOS single-chip microprocessors integrate a Hitachi-original architecture,
high-speed CPU with peripheral functions required for system configuration.
The CPU has a RISC-type instruction set. Most instructions can be executed in one clock cycle,
which greatly improves instruction execution speed. In addition, the 32-bit internal-bus
architecture enhances data processing power. With this CPU, it has become possible to assemble
low cost, high performance/high-functioning systems, even for applications that were previously
impossible with microprocessors, such as real-time control, which demands high speeds. In
particular, this LSI has a 1-kbyte on-chip cache, which allows an improvement in CPU
performance during external memory access.
In addition, this LSI includes on-chip peripheral functions necessary for system configuration,
such as large-capacity ROM (except the SH7014, which is ROMless) and RAM, timers, a serial
communication interface (SCI), an A/D converter, an interrupt controller, and I/O ports. Memory
or peripheral LSIs can be connected efficiently with an external memory access support function.
This greatly reduces system cost.
This LSI has an F-ZTAT
TM
version with on-chip flash memory and a mask ROM version. These
versions enable users to respond quickly and flexibly to changing application specifications,
growing production volumes, and other conditions.
This hardware manual covers the SH7014/16/17/. For a detailed description of instructions, refer
to the programming manual.
Related Manuals
SH7014/16/17 instruction execution:
SH-1/SH-2/SH-DSP Programming Manual
For information on development systems, please contact a Hitachi sales representative.
Analogue and Mixed Signal
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