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10M40SCE144C8

Description
Field Programmable Gate Array, PQFP144, 22 X 22 MM, 0.50 MM PITCH, PLASTIC, EQFP-144
CategoryProgrammable logic devices    Programmable logic   
File Size604KB,14 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
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10M40SCE144C8 Overview

Field Programmable Gate Array, PQFP144, 22 X 22 MM, 0.50 MM PITCH, PLASTIC, EQFP-144

10M40SCE144C8 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIntel
package instruction22 X 22 MM, 0.50 MM PITCH, PLASTIC, EQFP-144
Reach Compliance Codecompliant
JESD-30 codeS-PQFP-G144
Number of terminals144
Maximum operating temperature85 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Package shapeSQUARE
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
surface mountYES
Temperature levelOTHER
Terminal formGULL WING
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
2014.09.22
MAX 10 FPGA Device Overview
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M10-OVERVIEW
MAX
®
10 devices are the industry’s first single chip, non-volatile programmable logic devices (PLDs) to
integrate the optimal set of system components.
The following lists the highlights of the MAX 10 devices:
Internally stored dual images with self-configuration
Comprehensive design protection features
Integrated ADCs
Hardware to implement the Nios II 32-bit microcontroller IP
MAX 10 devices are the ideal solution for system management, I/O expansion, communication control
planes, industrial, automotive, and consumer applications.
MAX 10 FPGA Device Datasheet
Related Information
Key Advantages of MAX 10 Devices
Table 1: Key Advantages of the MAX 10 Device Family
Advantage
Supporting Feature
Simple and fast configuration
Flexibility and integration
Secure on-die configuration in less than 10 ms
• Single device integrating PLD logic, RAM, flash memory,
digital signal processing (DSP), ADC, phase-locked loop
(PLL), and I/Os
• Small packages available from 3 mm x 3 mm
• Sleep mode — significant standby power reduction and
resume in less than 1 ms
• Longer battery life — resume from full power-off in less
than 10 ms
Built on TSMC's 55 nm process technology
Low power
20 years estimated life cycle
2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at
www.altera.com/common/legal.html.
Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
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