DISCRETE SEMICONDUCTORS
DATA SHEET
BUJ103AX
Silicon Diffused Power Transistor
Product specification
August 1998
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
GENERAL DESCRIPTION
BUJ103AX
High-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended
for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor
control systems, etc.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CBO
V
CEO
I
C
I
CM
P
tot
V
CEsat
h
FEsat
t
f
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
DC current gain
Fall time
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
0.25
12.5
33
MAX.
700
700
400
4
8
26
1.0
-
80
UNIT
V
V
V
A
A
W
V
ns
T
hs
≤
25 ˚C
I
C
= 3 A; V
CE
= 5 V
Ic=2A,I
B1
=0.4A
PINNING - SOT186A
PIN
1
2
3
base
collector
emitter
DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
c
b
1 2 3
case isolated
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
V
CBO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
PARAMETER
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
700
400
700
4
8
2
4
26
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
T
hs
≤
25 ˚C
THERMAL RESISTANCES
SYMBOL
R
th j-hs
R
th j-a
PARAMETER
Junction to heatsink
Junction to ambient
CONDITIONS
with heatsink compound
in free air
TYP.
-
55
MAX.
4.8
-
UNIT
K/W
K/W
August 1998
1
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
ISOLATION LIMITING VALUE & CHARACTERISTIC
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
V
isol
PARAMETER
R.M.S. isolation voltage from all
three terminals to external
heatsink
CONDITIONS
f = 50-60 Hz; sinusoidal
waveform;
R.H.
≤
65% ; clean and dustfree
MIN.
-
TYP.
BUJ103AX
MAX.
2500
UNIT
V
C
isol
Capacitance from T2 to external f = 1 MHz
heatsink
-
10
-
pF
STATIC CHARACTERISTICS
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
I
CES
I
CES
I
CBO
I
CEO
I
EBO
V
CEOsust
V
CEsat
V
BEsat
h
FE
h
FE
h
FEsat
PARAMETER
Collector cut-off current
1
Collector cut-off current
1
Emitter cut-off current
Collector-emitter sustaining voltage
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
DC current gain
CONDITIONS
V
BE
= 0 V; V
CE
= V
CESMmax
V
BE
= 0 V; V
CE
= V
CESMmax
;
T
j
= 125 ˚C
V
CBO
= V
CESMmax
(700V)
V
CEO
= V
CEOMmax
(400V)
V
EB
= 7 V; I
C
= 0 A
I
B
= 0 A; I
C
= 10 mA;
L = 25 mH
I
C
= 3.0 A; I
B
= 0.6 A
I
C
= 3.0 A; I
B
= 0.6 A
I
C
= 1 mA; V
CE
= 5 V
I
C
= 0.5 A; V
CE
= 5 V
I
C
= 2 A; V
CE
= 5 V
I
C
= 3 A; V
CE
= 5 V
MIN.
-
-
-
-
-
400
-
-
10
12
13.5
-
TYP.
-
-
-
-
-
-
0.25
0.97
17
20
16
12.5
MAX.
1.0
2.0
0.1
0.1
0.1
-
1.0
1.5
32
32
20
-
UNIT
mA
mA
mA
mA
mA
V
V
V
DYNAMIC CHARACTERISTICS
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
Switching times (resistive load)
t
on
t
s
t
f
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
CONDITIONS
I
Con
= 2.5 A; I
Bon
= -I
Boff
= 0.5 A;
R
L
= 75 ohms; V
BB2
= 4 V;
TYP.
MAX.
UNIT
µs
µs
µs
µs
ns
µs
ns
0.52
2.7
0.3
0.6
3.2
0.43
I
Con
= 2 A; I
Bon
= 0.4 A; L
B
= 1
µH;
-V
BB
= 5 V
I
Con
= 2 A; I
Bon
= 0.4 A; L
B
= 1
µH;
-V
BB
= 5 V; T
j
= 100 ˚C
1.2
33
1.33
80
-
-
1.8
200
1
Measured with half sine-wave voltage (curve tracer).
August 1998
2
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ103AX
+ 50v
100-200R
IC
90 %
ICon
90 %
10 %
Horizontal
Oscilloscope
Vertical
300R
30-60 Hz
6V
1R
IB
ts
ton
toff
IBon
10 %
tr
30ns
-IBoff
tf
Fig.1. Test circuit for V
CEOsust
.
Fig.4. Switching times waveforms with resistive load.
IC / mA
VCC
250
200
LC
IBon
100
LB
T.U.T.
-VBB
0
VCE / V
min
VCEOsust
Fig.2. Oscilloscope display for V
CEOsust
.
Fig.5. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V; L
C
= 200 uH; L
B
= 1 uH
VCC
ICon
90 %
IC
RL
VIM
0
tp
IB
RB
T.U.T.
ts
toff
IBon
10 %
tf
t
T
-IBoff
t
Fig.3. Test circuit resistive load. V
IM
= -6 to +8 V
V
CC
= 250 V; t
p
= 20
µ
s;
δ
= t
p
/ T = 0.01.
R
B
and R
L
calculated from I
Con
and I
Bon
requirements.
Fig.6. Switching times waveforms with inductive load.
August 1998
3
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ103AX
120
110
100
90
80
70
60
50
40
30
20
10
0
%
Normalised Derating
with heatsink compound
1.4
1.2
1.0
VBEsat/V
P tot
0.8
0.6
0.4
0.2
0.0
0
20
40
60
80
Ths / C
100
120
140
0.1
1
IC/A
10
Fig.7. Normalised power dissipation.
PD% = 100
⋅
PD/PD
25˚C
= f (T
hs
)
h
FE
100
5V
Fig.10. Base-Emitter saturation voltage.
Solid lines = typ values, V
BEsat
= f(IC); at IC/IB =4.
VCEsat/V
0.5
0.4
10
0.3
Tj = 25 C
0.2
1V
0.1
1
0.01
0.1
IC / A
1
10
0.0
0.1
1
IC/A
10
Fig.8. Typical DC current gain. h
FE
= f(I
C
)
parameter V
CE
Fig.11. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IC); at IC/IB =4.
Zth / (K/W)
BU1706AX
VCEsat/V
2.0
10
1.6
IC=1A
1.2
2A
3A
4A
0.5
1
0.2
0.1
0.05
0.02
P
D
tp
t
p
0.8
0.1
D=
T
t
0.4
0.01
D=0
T
10u 100u 1m 10m 100m
t/s
1
0.0
0.01
0.10
IB/A
1.00
10.00
0.001
1u
10
100
Fig.9. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IB); T
j
=25˚C.
Fig.12. Transient thermal impedance.
Z
th j-hs
= f(t); parameter D = t
p
/T
August 1998
4
Rev 1.000
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