PBSS4160DS
60 V, 1 A NPN/NPN low V
CEsat
(BISS) transistor
Rev. 04 — 11 December 2009
Product data sheet
1. Product profile
1.1 General description
NPN/NPN low V
CEsat
Breakthrough In Small Signal (BISS) transistor pair in a SOT457
(SC-74) Surface Mounted Device (SMD) plastic package.
PNP/PNP complement: PBSS5160DS.
1.2 Features
Low collector-emitter saturation voltage V
CEsat
High collector current capability: I
C
and I
CM
High collector current gain (h
FE
) at high I
C
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
Dual low power switches (e.g. motors, fans)
Automotive applications
1.4 Quick reference data
Table 1.
Symbol
V
CEO
I
C
I
CM
R
CEsat
[1]
[2]
Quick reference data
Parameter
collector-emitter voltage
collector current
peak collector current
collector-emitter saturation
resistance
single pulse;
t
p
≤
1 ms
I
C
= 1 A;
I
B
= 100 mA
[2]
Conditions
open base
[1]
Min
-
-
-
-
Typ
-
-
-
200
Max
60
1
2
250
Unit
V
A
A
mΩ
Per transistor
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
Pulse test: t
p
≤
300
μs; δ ≤
0.02.
NXP Semiconductors
PBSS4160DS
60 V, 1 A NPN/NPN low V
CEsat
(BISS) transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
Pinning
Description
emitter TR1
base TR1
collector TR2
emitter TR2
base TR2
collector TR1
1
2
sym020
Simplified outline
6
5
4
Symbol
6
5
4
TR2
1
2
3
TR1
3
3. Ordering information
Table 3.
Ordering information
Package
Name
PBSS4160DS
SC-74
Description
plastic surface mounted package (TSOP6); 6 leads
Version
SOT457
Type number
4. Marking
Table 4.
Marking codes
Marking code
B8
Type number
PBSS4160DS
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Per transistor
V
CBO
V
CEO
V
EBO
I
C
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
open emitter
open base
open collector
[1]
[2]
[3]
Conditions
Min
-
-
-
-
-
-
-
-
-
Max
80
60
5
0.87
1
1
2
300
1
Unit
V
V
V
A
A
A
A
mA
A
I
CM
I
B
I
BM
peak collector current
base current
peak base current
single pulse; t
p
≤
1 ms
single pulse; t
p
≤
1 ms
PBSS4160DS_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 11 December 2009
2 of 14
NXP Semiconductors
PBSS4160DS
60 V, 1 A NPN/NPN low V
CEsat
(BISS) transistor
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
P
tot
total power dissipation
Conditions
T
amb
≤
25
°C
[1]
[2]
[3]
Min
-
-
-
-
-
-
-
−65
−65
Max
290
370
450
420
560
700
150
+150
+150
Unit
mW
mW
mW
mW
mW
mW
°C
°C
°C
Per device
P
tot
total power dissipation
T
amb
≤
25
°C
[1]
[2]
[3]
T
j
T
amb
T
stg
[1]
[2]
[3]
junction temperature
ambient temperature
storage temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
800
P
tot
(mW)
600
(1)
006aaa493
(2)
(3)
400
200
0
0
40
80
120
160
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
2
(3) FR4 PCB, standard footprint
Fig 1.
Power derating curves
PBSS4160DS_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 11 December 2009
3 of 14
NXP Semiconductors
PBSS4160DS
60 V, 1 A NPN/NPN low V
CEsat
(BISS) transistor
6. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
Conditions
in free air
[1]
[2]
[3]
Min
-
-
-
-
Typ
-
-
-
-
Max
431
338
278
105
Unit
K/W
K/W
K/W
K/W
Per transistor
R
th(j-sp)
Per device
R
th(j-a)
thermal resistance from
junction to solder point
thermal resistance from
junction to ambient
in free air
[1]
[2]
[3]
-
-
-
-
-
-
298
223
179
K/W
K/W
K/W
[1]
[2]
[3]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
10
3
Z
th(j-a)
(K/W)
10
2
0.20
0.10
0.05
10
0.02
0.01
δ
=1
0.75
0.50
0.33
006aaa494
0
1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse time; typical values
PBSS4160DS_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 11 December 2009
4 of 14
NXP Semiconductors
PBSS4160DS
60 V, 1 A NPN/NPN low V
CEsat
(BISS) transistor
10
3
Z
th(j-a)
(K/W)
10
2
0.20
0.10
0.05
10
0.02
0.01
δ
=1
0.75
0.50
0.33
006aaa495
0
1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
10
3
Z
th(j-a)
(K/W)
10
2
Transient thermal impedance from junction to ambient as a function of pulse time; typical values
006aaa496
δ
=1
0.75
0.50
0.20
0.10
0.05
0.33
10
0.02
0.01
0
1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
Transient thermal impedance from junction to ambient as a function of pulse time; typical values
PBSS4160DS_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 11 December 2009
5 of 14