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AS4C256K16E0-30JC

Description
5V 256Kx16 CMOS DRAM (EDO)
Categorystorage    storage   
File Size514KB,24 Pages
ManufacturerALSC [Alliance Semiconductor Corporation]
Download Datasheet Parametric Compare View All

AS4C256K16E0-30JC Overview

5V 256Kx16 CMOS DRAM (EDO)

AS4C256K16E0-30JC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerALSC [Alliance Semiconductor Corporation]
Parts packaging codeSOJ
package instructionSOJ, SOJ40,.44
Contacts40
Reach Compliance Codeunknow
ECCN codeEAR99
access modeFAST PAGE WITH EDO
Maximum access time30 ns
Other featuresRAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O typeCOMMON
JESD-30 codeR-PDSO-J40
JESD-609 codee0
length26.0985 mm
memory density4194304 bi
Memory IC TypeEDO DRAM
memory width16
Number of functions1
Number of ports1
Number of terminals40
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ40,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
refresh cycle512
Maximum seat height3.76 mm
self refreshYES
Maximum standby current0.001 A
Maximum slew rate0.2 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
AS4C256K16E0
®
5V 256K×16 CMOS DRAM (EDO)
Features
• Organization: 262,144 words × 16 bits
• High speed
- 30/35/50 ns RAS access time
- 16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
• Low power consumption
- Active: 500 mW max (AS4C256K16E0-25)
- Standby: 3.6 mW max, CMOS I/O (AS4C256K16E0-25)
• EDO page mode
• Refresh
- 512 refresh cycles, 8 ms refresh interval
- RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation device
only. Contact Alliance for more information.
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
• 5V power supply
• Latch-up current > 200 mA
Pin arrangement
SOJ
Vcc
I/O0
I/O1
I/O2
I/O3
Vcc
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
Pin designation
TSOP II
1
2
3
4
5
6
7
8
9
10
44
43
42
41
40
39
38
37
36
35
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
Pin(s)
A0 to A8
RAS
Description
Address inputs
Row address strobe
Input/output
Output enable
Column address strobe, upper byte
Column address strobe, lower byte
Read/write control
Power (5V
±
0.5V)
Ground
I/O0 to I/O15
OE
UCAS
LCAS
AS4C256K16E0
NC
NC
WE
RAS
NC
A0
A1
A2
A3
V
CC
AS4C256K16E0
13
14
15
16
17
18
19
20
21
22
32
31
30
29
28
27
26
25
24
23
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
WE
V
CC
GND
Selection guide
Symbol
Maximum
RAS
access time
Maximum column address access time
Maximum
CAS
access time
Maximum output enable (
OE
) access time
Minimum read or write cycle time
Minimum EDO page mode cycle time
Maximum operating current
Maximum CMOS standby current
Shaded areas contain advance information.
AS4C256K16E0-30
30
16
10
10
65
12
180
2.0
AS4C256K16E0-35
35
18
10
10
70
14
160
2.0
AS4C256K16E0-50
50
25
10
10
85
25
140
2.0
Unit
ns
ns
ns
ns
ns
ns
mA
mA
t
RAC
t
CAA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC2
4/11/01; v.1.1
Alliance Semiconductor
1 of 24
Copyright © Alliance Semiconductor. All rights reserved.

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