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935273946118

Description
16 I/O, PIA-GENERAL PURPOSE, PDSO24
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size183KB,31 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric View All

935273946118 Overview

16 I/O, PIA-GENERAL PURPOSE, PDSO24

935273946118 Parametric

Parameter NameAttribute value
MakerNXP
package instructionTSSOP,
Reach Compliance Codeunknown
ECCN codeEAR99
JESD-30 codeR-PDSO-G24
length7.8 mm
Number of I/O lines16
Number of ports2
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Maximum seat height1.1 mm
Maximum supply voltage5.5 V
Minimum supply voltage2.3 V
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
uPs/uCs/peripheral integrated circuit typePARALLEL IO PORT, GENERAL PURPOSE
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
Rev. 05 — 15 September 2008
Product data sheet
1. General description
The PCA9535 and PCA9535C are 24-pin CMOS devices that provide 16 bits of General
Purpose parallel Input/Output (GPIO) expansion for I
2
C-bus/SMBus applications and was
developed to enhance the NXP Semiconductors family of I
2
C-bus I/O expanders. The
improvements include higher drive capability, 5 V I/O tolerance, lower supply current,
individual I/O configuration, and smaller packaging. I/O expanders provide a simple
solution when additional I/O is needed for ACPI power switches, sensors, push buttons,
LEDs, fans, etc.
The PCA9535 and PCA9535C consist of two 8-bit Configuration (Input or Output
selection), Input, Output and Polarity Inversion (active HIGH or active LOW operation)
registers. The system master can enable the I/Os as either inputs or outputs by writing to
the I/O configuration bits. The data for each input or output is kept in the corresponding
Input or Output register. The polarity of the read register can be inverted with the Polarity
Inversion register. All registers can be read by the system master. Although pin-to-pin and
I
2
C-bus address compatible with the PCF8575, software changes are required due to the
enhancements and are discussed in
Application Note AN469.
The PCA9535 is identical to the PCA9555 except for the removal of the internal I/O pull-up
resistor which greatly reduces power consumption when the I/Os are held LOW.
The PCA9535C is identical to the PCA9535 except that all the I/O pins are
high-impedance open-drain outputs.
The PCA9535 and PCA9535C open-drain interrupt output is activated when any input
state differs from its corresponding Input Port register state and is used to indicate to the
system master that an input state has changed. The power-on reset sets the registers to
their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I
2
C-bus address and allow up to eight
devices to share the same I
2
C-bus/SMBus. The fixed I
2
C-bus address of the PCA9535
and PCA9535C are the same as the PCA9555 allowing up to eight of these devices in any
combination to share the same I
2
C-bus/SMBus.
2. Features
I
I
I
I
I
I
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant I/Os
Polarity Inversion register
Active LOW interrupt output
Low standby current
Noise filter on SCL/SDA inputs
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