MC145145L1 datasheet, PDF - EEWORLD Datasheet

MC145145L1: DescriptionIC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,CERAMIC; CategoryAnalog mixed-signal IC The signal circuit; File Size737KB，13 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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MC145145L1 Overview

IC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,CERAMIC

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	NXP
package instruction	DIP, DIP18,.3
Reach Compliance Code	unknown
JESD-30 code	R-XDIP-T18
JESD-609 code	e0
Number of terminals	18
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP18,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Certification status	Not Qualified
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

	MC145145L1	MC145145P1DS	MC145145LDS	MC145145P1	MC145145LD
Description	IC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,CERAMIC	IC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,PLASTIC	IC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,CERAMIC	IC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,PLASTIC	IC,FREQUENCY SYNTHESIZER,CMOS,DIP,18PIN,CERAMIC
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	NXP	NXP	NXP	NXP	NXP
package instruction	DIP, DIP18,.3	DIP, DIP18,.3	DIP, DIP18,.3	DIP, DIP18,.3	DIP, DIP18,.3
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
JESD-30 code	R-XDIP-T18	R-PDIP-T18	R-XDIP-T18	R-PDIP-T18	R-XDIP-T18
JESD-609 code	e0	e0	e0	e0	e0
Number of terminals	18	18	18	18	18
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	CERAMIC	PLASTIC/EPOXY	CERAMIC	PLASTIC/EPOXY	CERAMIC
encapsulated code	DIP	DIP	DIP	DIP	DIP
Encapsulate equivalent code	DIP18,.3	DIP18,.3	DIP18,.3	DIP18,.3	DIP18,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
surface mount	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL

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