R5F104BDANA#U0 datasheet, PDF - EEWORLD Datasheet

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R5F104BDANA#U0: DescriptionR5F104BDANA#U0; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，222 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/; Environmental Compliance

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R5F104BDANA#U0 Overview

R5F104BDANA#U0

R5F104BDANA#U0 Parametric

Parameter Name	Attribute value
Brand Name	Renesas
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Renesas Electronics Corporation
Parts packaging code	HWQFN
package instruction	HVQCCN, LCC32,.2SQ,20
Contacts	32
Manufacturer packaging code	PWQN0032KB-A32
Reach Compliance Code	compliant
Factory Lead Time	20 weeks
Samacsys Description	RL78/G14
Has ADC	YES
Other features	ALSO OPERATES AT 1.6 V MINIMUM SUPPLY AT 4 MHZ
Address bus width
bit size	16
CPU series	RL78
maximum clock frequency	20 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQCC-N32
length	5 mm
Number of I/O lines	28
Number of terminals	32
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC32,.2SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8/5 V
Certification status	Not Qualified
RAM (bytes)	5632
rom(word)	49152
ROM programmability	FLASH
Maximum seat height	0.8 mm
speed	32 MHz
Maximum slew rate	8.7 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	2.7 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

User Manual

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Datasheet

RL78/G14

RENESAS MCU

R01DS0053EJ0331

Rev. 3.31

Feb 14, 2020

True low-power platform (66

μA/MHz,

and 0.60

μA

for operation with only RTC and LVD) for the general-purpose

applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 44 DMIPS at 32 MHz

1. OUTLINE

1.1

Features

Event Link Controller (ELC)

• Event signals of 19 to 26 types can be linked to the

specified peripheral function.

Serial Interfaces

• CSI: 3 to 8 channels

• UART/UART (LIN-bus supported): 3 or 4 channels

• I

C/simplified I

C: 3 to 8 channels

Timer

• 16-bit timer: 8 to 12 channels

(Timer Array Unit (TAU): 4 to 8 channels, Timer RJ: 1

channel, Timer RD: 2 channels, Timer RG: 1 channel)

• 12-bit interval timer: 1 channel

• Real-time clock: 1 channel (calendar for 99 years, alarm

function, and clock correction function)

• Watchdog timer: 1 channel (operable with the dedicated

low-speed on-chip oscillator)

A/D Converter

• 8/10-bit resolution A/D converter (V

= 1.6 to 5.5 V)

• Analog input: 8 to 20 channels

• Internal reference voltage (1.45 V) and temperature

sensor

D/A Converter

• 8-bit resolution D/A converter (V

= 1.6 to 5.5 V)

• Analog output: None or up to two channels

• Output voltage: 0 V to V

• Real-time output function

Comparator

• None or up to two channels

• Operating modes: Comparator high-speed mode,

comparator low-speed mode, window mode

• The external reference voltage or internal reference

voltage can be selected as the reference voltage.

I/O Port

• I/O port: 26 to 92 (N-ch open drain I/O [withstand

voltage of 6 V]: 2 to 4, N-ch open drain I/O [V

withstand voltage/EV

withstand voltage]: 10 to 28)

• Can be set to N-ch open drain, TTL input buffer, and on-

chip pull-up resistor

• Different potential interface: Can connect to a 1.8/2.5/3

V device

• On-chip key interrupt function

• On-chip clock output/buzzer output controller

Others

• On-chip BCD (binary-coded decimal) correction circuit

Remark

The functions mounted depend on the product.

See

1.6 Outline of Functions.

Ultra-Low Power Consumption Technology

• V

= single power supply voltage of 1.6 to 5.5 V which

can operate a 1.8 V device at a low voltage

• HALT mode

• STOP mode

• SNOOZE mode

RL78 CPU Core

• CISC architecture with 3-stage pipeline

• Minimum instruction execution time: Can be changed

from high speed (0.03125

s:

@ 32 MHz operation with

high-speed on-chip oscillator) to ultra-low speed (30.5

s:

@ 32.768 kHz operation with subsystem clock)

• Multiply/divide/multiply & accumulate instructions are

supported.

• Address space: 1 MB

• General-purpose registers: (8-bit register



4 banks

• On-chip RAM: 2.5 to 48 KB

Code Flash Memory

• Code flash memory: 16 to 512 KB

• Block size: 1 KB

• Prohibition of block erase and rewriting (security

function)

• On-chip debug function

• Self-programming (with boot swap function/flash shield

window function)

Data Flash Memory

• Data flash memory: 4 KB and 8 KB

• Back ground operation (BGO): Instructions can be

executed from the program memory while rewriting the

data flash memory.

• Number of rewrites: 1,000,000 times (TYP.)

• Voltage of rewrites: V

= 1.8 to 5.5 V

High-speed On-chip Oscillator

• Select from 64 MHz, 48 MHz, 32 MHz, 24 MHz, 16 MHz,

12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and

1 MHz

• High accuracy: ±1.0% (V

= 1.8 to 5.5 V, T

= -20 to

+85°C)

Operating Ambient Temperature

• T

= -40 to +85°C (A: Consumer applications, D:

Industrial applications)

• T

= -40 to +105°C (G: Industrial applications)

Power Management and Reset Function

• On-chip power-on-reset (POR) circuit

• On-chip voltage detector (LVD) (Select interrupt and

reset from 14 levels)

Data Transfer Controller (DTC)

• Transfer modes: Normal transfer mode, repeat transfer

mode, block transfer mode

• Activation sources: Activated by interrupt sources.

• Chain transfer function

R01DS0053EJ0331 Rev. 3.31

Feb 14, 2020

Page 1 of 217

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