EEWORLDEEWORLDEEWORLD

Part Number

Search

AS7C251MPFD18A-166TQCN

Description
2.5V 1M x 18 pipelined burst synchronous SRAM
Categorystorage    storage   
File Size493KB,19 Pages
ManufacturerALSC [Alliance Semiconductor Corporation]
Environmental Compliance
Download Datasheet Parametric Compare View All

AS7C251MPFD18A-166TQCN Overview

2.5V 1M x 18 pipelined burst synchronous SRAM

AS7C251MPFD18A-166TQCN Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerALSC [Alliance Semiconductor Corporation]
Parts packaging codeQFP
package instructionLQFP, QFP100,.63X.87
Contacts100
Reach Compliance Codeunknow
ECCN code3A991.B.2.A
Maximum access time3.5 ns
Other featuresPIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)166 MHz
I/O typeCOMMON
JESD-30 codeR-PQFP-G100
JESD-609 codee3
length20 mm
memory density18874368 bi
Memory IC TypeSTANDARD SRAM
memory width18
Number of functions1
Number of terminals100
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX18
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP100,.63X.87
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)245
power supply2.5 V
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum standby current0.04 A
Minimum standby current2.38 V
Maximum slew rate0.29 mA
Maximum supply voltage (Vsup)2.625 V
Minimum supply voltage (Vsup)2.375 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
February 2005
®
AS7C251MPFD18A
2.5V 1M x 18 pipelined burst synchronous SRAM
Features
Organization: 1,048,576 x18 bits
Fast clock speeds to 166 MHz
Fast clock to data access: 3.5/3.8 ns
Fast OE access time: 3.5/3.8 ns
Fully synchronous register-to-register operation
Double-cycle deselect
Asynchronous output enable control
Available 100-pin TQFP package
Individual byte write and global write
Multiple chip enables for easy expansion
2.5V core power supply
Linear or interleaved burst control
Snooze mode for reduced power-standby
Common data inputs and data outputs
Logic block diagram
LBO
CLK
ADV
ADSC
ADSP
A[19:0]
CLK
CS
CLR
Burst logic
Q
20
CS
Address
D
20
18 20
1M
x
18
Memory
array
18
18
register
CLK
GWE
BW
b
BWE
BW
a
CE0
CE1
CE2
D
DQb
Q
CLK
D
DQa
Q
Byte Write
registers
Byte Write
registers
CLK
D
2
OE
CE
CLK
D
ZZ
Enable
register
Q
Output
registers
CLK
Input
registers
CLK
Power
down
Enable
Q
delay
register
CLK
OE
18
DQ[a,b]
Selection guide
-166
Minimum cycle time
Maximum clock frequency
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
6
166
3.5
290
85
40
-133
7.5
133
3.8
270
75
40
Units
ns
MHz
ns
mA
mA
mA
2/10/05, v. 1.2
Alliance Semiconductor
1 of 19
Copyright © Alliance Semiconductor. All rights reserved.

AS7C251MPFD18A-166TQCN Related Products

AS7C251MPFD18A-166TQCN AS7C251MPFD18A AS7C251MPFD18A-133TQIN AS7C251MPFD18A-133TQI AS7C251MPFD18A-166TQC
Description 2.5V 1M x 18 pipelined burst synchronous SRAM 2.5V 1M x 18 pipelined burst synchronous SRAM 2.5V 1M x 18 pipelined burst synchronous SRAM 2.5V 1M x 18 pipelined burst synchronous SRAM 2.5V 1M x 18 pipelined burst synchronous SRAM
Is it Rohs certified? conform to - conform to incompatible incompatible
Maker ALSC [Alliance Semiconductor Corporation] - ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation]
Parts packaging code QFP - QFP QFP QFP
package instruction LQFP, QFP100,.63X.87 - LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87
Contacts 100 - 100 100 100
Reach Compliance Code unknow - unknow unknow unknow
ECCN code 3A991.B.2.A - 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 3.5 ns - 3.8 ns 3.8 ns 3.5 ns
Other features PIPELINED ARCHITECTURE - PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK) 166 MHz - 133 MHz 133 MHz 166 MHz
I/O type COMMON - COMMON COMMON COMMON
JESD-30 code R-PQFP-G100 - R-PQFP-G100 R-PQFP-G100 R-PQFP-G100
JESD-609 code e3 - e3 e0 e0
length 20 mm - 20 mm 20 mm 20 mm
memory density 18874368 bi - 18874368 bi 18874368 bi 18874368 bi
Memory IC Type STANDARD SRAM - STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 18 - 18 18 18
Number of functions 1 - 1 1 1
Number of terminals 100 - 100 100 100
word count 1048576 words - 1048576 words 1048576 words 1048576 words
character code 1000000 - 1000000 1000000 1000000
Operating mode SYNCHRONOUS - SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C - 85 °C 85 °C 70 °C
organize 1MX18 - 1MX18 1MX18 1MX18
Output characteristics 3-STATE - 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP - LQFP LQFP LQFP
Encapsulate equivalent code QFP100,.63X.87 - QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK, LOW PROFILE - FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Parallel/Serial PARALLEL - PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 245 - 245 NOT SPECIFIED NOT SPECIFIED
power supply 2.5 V - 2.5 V 2.5 V 2.5 V
Certification status Not Qualified - Not Qualified Not Qualified Not Qualified
Maximum seat height 1.6 mm - 1.6 mm 1.6 mm 1.6 mm
Maximum standby current 0.04 A - 0.04 A 0.04 A 0.04 A
Minimum standby current 2.38 V - 2.38 V 2.38 V 2.38 V
Maximum slew rate 0.29 mA - 0.27 mA 0.27 mA 0.29 mA
Maximum supply voltage (Vsup) 2.625 V - 2.625 V 2.625 V 2.625 V
Minimum supply voltage (Vsup) 2.375 V - 2.375 V 2.375 V 2.375 V
Nominal supply voltage (Vsup) 2.5 V - 2.5 V 2.5 V 2.5 V
surface mount YES - YES YES YES
technology CMOS - CMOS CMOS CMOS
Temperature level COMMERCIAL - INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface MATTE TIN - MATTE TIN Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING - GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm - 0.65 mm 0.65 mm 0.65 mm
Terminal location QUAD - QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 - 30 NOT SPECIFIED NOT SPECIFIED
width 14 mm - 14 mm 14 mm 14 mm
Quartus II 11.0 cannot generate pof and sof files
Quartus II 11.0 cannot generate pof and sof files. I used version 9.0 before and just installed this version, but I don’t know how to use it yet....
zhenpeng25 FPGA/CPLD
Compilation error of assembly instruction under ccs
I have a question for you: I am using CCS4.2, and the development board is the original TI DEMO board F28M35. I am experimenting under the Cortex-M3 core, and the problem is: There is an instruction i...
luanma0428 TI Technology Forum
How to use Verilog HDL language to display the word "North" on an 8*8 LED dot matrix display
How to use Verilog HDL language to display the word "North" on an 8*8LED dot matrix display~~~ It is really urgent~~ If there is a similar program, can you refer to it~~ Thank you~~~...
bpt888 Embedded System
3D glasses
How to make a 3d glasses with tps65835!!!...
305050996 Integrated technical exchanges
Request Altium Designer6.5 Chinese version
Friends: Who has the Chinese version of Altium Designer 6.5? ! !...
475332317 Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2505  360  259  1123  1231  51  8  6  23  25 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号