SC667
7 LED Light Management Unit
POWER MANAGEMENT
Features
Automatic Dropout Prevention, Ambient Light
Sense Input, PWM Dimming, and 4 LDOs
Description
The SC667 is a highly integrated light management unit
that provides programmable current for up to seven LED
current sinks. Four LED banks are provided to allow set-
tings for various LED zones or indicators. Four low-noise
LDOs with programmable outputs ranging from 1.2V to 3.3V
and 200mA maximum output current are also included.
ADP limits the maximum LED current to a level that ensures
the LEDs maintain matched currents when the supply
voltage approaches dropout. This feature produces accept-
able light output at low supply voltage levels without
requiring a boost converter or charge pump.
Two interfaces are provided for design flexibility. The I
2
C
interface controls the LED on/off functions, assigns the
LEDs to backlight banks, programs the LED currents, pro-
grams the lighting effects, enables the LDOs, and sets the
LDO output voltages. The PWM interface reduces the
current setting for LED bank #1 by a factor equal to the duty
cycle of the applied PWM signal. A filter at the PWM input
converts the pulsed signal to a DC current level, resulting in
less switching noise compared to pulsed current methods.
The ADI input translates the voltage from an external ALS
(Ambient Light Sensor) into a digitized code using a sigma-
delta ADC. This block includes level detection to adjust the
current setting of bank #1 with two different programmable
levels based on the ambient light level. An interrupt output
transitions low to notify the host processor that a level
adjustment has been made.
SC667
V
IN
BL1
BL2
GND
SDA
SCL
PWM
EN
ADI
BYP
C
BYP
BL3
BL4
BL5
BL6
BL7
IRQ
LDO1
LDO2
LDO3
LDO4
C
1
C
2
C
3
C
4
V
DD
R
1
Flag for ALS
LDO1
LDO2
LDO3
LDO4
Seven LED backlight sinks with 32 current settings
from 0mA to 25mA
Up to four LED backlight banks
Lighting effects — fade-in/fade-out, breathe, blink,
auto-dim full, and auto-dim partial functions
ADP (Automatic Dropout Prevention) for backlights
ALS (Ambient Light Sense) option sets the backlight
brightness according to ambient lighting conditions
I
2
C Bus fast mode and standard mode
IRQ (Interrupt request) — open-drain output indi-
cates a change of state for the ALS
Backlight current accuracy — ±1.5% typical
Backlight current matching — ±0.5% typical
Four programmable 200mA low-noise LDO regulators
PWM interface (200Hz to 50kHz) with internal digital
low-pass filter
Automatic sleep mode with all LEDs off
Shutdown current — 0.1µA typical
Ultra-thin package — 3 x 3 x 0.6 (mm)
Lead-free and halogen-free
WEEE and RoHS compliant
Applications
Cellular phones, smart phones, and PDAs
LCD modules
Portable media players and digital cameras
Personal navigation devices
Display/keypad backlighting and LED indicators
Typical Application Circuit
2.9 to 5.5V
R
SDA
I C Data
I C Clock
Backlight PWM
Device Enable
V
LDO4
2
2
V
IN
C
IN
R
SCL
IN
Ambient Light Sensor
May 21, 2010
© 2010 Semtech Corporation
1
SC667
Absolute Maximum Ratings
Pin Voltage — IN (V) . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0
Pin Voltage — All Other Pins (V) . . . . . . . . . -0.3 to (V
IN
+ 0.3)
LDOn
(1)
Short Circuit Duration . . . . . . . . . . . . . . .Continuous
ESD Protection Level
(2)
(kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5
Recommended Operating Conditions
Ambient Temperature Range (°C) . . . . . . . . . .-40
≤
T
A
≤
+85
Input Voltage (V) . . . . . . . . . . . . . . . . . . . . . . . . .2.9
≤
V
IN
≤
5.5
Backlight Sink Voltage (V) . . . . . . . . . . . . . . . .0.05
≤
V
BLn
≤
4.2
Thermal Information
Thermal Resistance, Junction to Ambient
(3)
(°C/W) . . . . 35
Storage Temperature Range (°C) . . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Subscripting for all LDOs (LDOn), n = 1, 2, 3, 4.
(2) Tested according to JEDEC standard JESD22-A114-B.
(3) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Parameter
Supply Specifications
Input Supply Voltage
Shutdown Current
Unless otherwise noted, T
A
= +25°C for Typ, -40ºC to +85°C for Min and Max, T
J(MAX)
= 125ºC, V
IN
= 3.7V, C
IN
= C
LDO1
= C
LDO2
= C
LDO3
= C
LDO4
= 1.0µF,
C
BYP
= 22nF, (ESR = 0.03Ω)
(1)
Symbol
Conditions
Min
Typ
Max
Units
V
IN
I
Q(OFF)
Shutdown, V
IN
= 4.2V
Sleep (all LDOs off ), EN = V
IN(2)
2.9
0.1
90
300
1.4
5.5
2.0
135
V
µA
µA
450
mA
Total Quiescent Current
I
Q
Sleep (all LDOs on), EN = V
IN
7 LEDs on
(2)
LED Sink Electrical Specifications
Maximum Total Backlight Current
Backlight Current Setting Range
Backlight Current Accuracy
Backlight Current Matching
(4)
Dropout Voltage
(5)
Current Sink Off-State Leakage Current
I
OUT(MAX)
I
BL
I
BL_ACC
I
BL-BL
V
DO
I
BL/FL(OFF)
Sum of all active LED currents, V
IN
above dropout level
Nominal setting for BL1 – BL7
I
BLn (3)
= 12mA
I
BLn (3)
= 12mA
One bank of 6 backlights set equal to 20mA
V
IN
= V
BLn(3)
= 4.2V
-3.5
0
±1.5
±0.5
59
0.1
1
+3.5
175
25
mA
mA
%
%
mV
µA
3
SC667
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Digital Input Electrical Specifications (PWM, EN, SDA, SCL)
Input High Threshold
(7) (8)
Input Low Threshold
(7) (8)
Input High Current
Input Low Current
V
IH
V
IL
I
IH
I
IL
V
IN
= 5.5V
V
IN
= 2.9V
V
IN
= 5.5V
V
IN
= 5.5V
-1
-1
1.6
0.4
+1
+1
V
V
µA
µA
Digital Output Electrical Specification (IRQ)
IRQ Output Low Level
PWM Input Specification (PWM)
PWM Input Frequency
f
PWM
0.2
50
kHz
V
OL
I
IRQ
≤ 3mA
0.4
V
I
2
C Interface
Interface complies with slave mode I
2
C interface as described by Philips I
2
C specification version 2.1 dated January, 2000.
Digital Input Voltage
(7)
SDA Output Low Level
Digital Input Current
Hysteresis of Schmitt Trigger Inputs
Maximum Glitch Pulse Rejection
I/O Pin Capacitance
I
2
C Timing
Clock Frequency
(7)
SCL Low Period
(7) (8)
SCL High Period
(7) (8)
Data Hold Time
(7) (8)
Data Setup Time
(7) (8)
Setup Time for Repeated
START Condition
(7) (8)
Hold Time for Repeated
START Condition
(7) (8)
Setup Time for STOP Condition
(7) (8)
Bus-Free Time Between
STOP and START
(7) (8)
Interface Start-up Time
(7) (8)
f
SCL
t
LOW
t
HIGH
t
HD_DAT
t
SU_DAT
t
SU_STA
t
HD_STA
t
SU_STO
t
BUF
t
EN
Bus start-up time after EN pin is pulled high
1.3
0.6
0
100
0.6
0.6
0.6
1.3
900
400
440
kHz
µs
µs
µs
ns
µs
µs
µs
µs
µs
I
B-IN
V
HYS
t
SP
C
IN
V
B-IL
V
B-IH
I
DIN
(SDA) ≤ 3mA
-0.2
0.1
50
10
1.6
0.4
0.2
0.4
V
V
V
µA
V
ns
pF
5
PCB Design
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