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LT3071IUFD-TR

Description
5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining
File Size498KB,28 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet View All

LT3071IUFD-TR Overview

5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining

LT3071
5A, Low Noise,
Programmable Output, 85mV
Dropout Linear Regulator
with Analog Margining
FeAtures
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Description
The LT
®
3071 is a low voltage, UltraFast™ transient re-
sponse linear regulator. The device supplies up to 5A of
output current with a typical dropout voltage of 85mV.
A 0.01µF reference bypass capacitor decreases output
voltage noise to 25µV
RMS
. The LT3071’s high bandwidth
permits the use of low ESR ceramic capacitors, saving
bulk capacitance and cost. The LT3071’s features make
it ideal for high performance FPGAs, microprocessors or
sensitive communication supply applications.
Output voltage is digitally selectable in 50mV increments
over a 0.8V to 1.8V range. An analog margining function
allows the user to adjust system output voltage over a
continuous ±10% range. The IC incorporates a unique
tracking function to control a buck regulator powering
the LT3071’s input. This tracking function drives the buck
regulator to maintain the LT3071’s input voltage to V
OUT
+ 300mV, minimizing power dissipation.
Internal protection includes UVLO, reverse-current protec-
tion, precision current limiting with power foldback and
thermal shutdown. The LT3071 regulator is available in a
thermally enhanced 28-lead, 4mm × 5mm QFN package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. UltraFast and VLDO are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patents pending.
Output Current: 5A
Dropout Voltage: 85mV Typical
Digitally Programmable V
OUT
: 0.8V to 1.8V
Analog Output Margining: ±10% Range
Low Output Noise: 25µV
RMS
(10Hz to 100kHz)
Parallel Multiple Devices for 10A or More
Precision Current Limit: ±20%
Output Current Monitor: I
MON
= I
OUT
/2500
±1% Accuracy Over Line, Load and Temperature
Stable with Low ESR Ceramic Output Capacitors
(15µF Minimum)
High Frequency PSRR: 30dB at 1MHz
Enable Function Turns Output On/Off
VIOC Pin Controls Buck Converter to Maintain Low
Power Dissipation and Optimize Efficiency
PWRGD/UVLO/Thermal Shutdown Flag
Current Limit with Foldback Protection
Thermal Shutdown
28-Lead (4mm × 5mm × 0.75mm) QFN Package
ApplicAtions
n
FPGA and DSP Supplies
n
ASIC and Microprocessor Supplies
n
Servers and Storage Devices
n
Post Buck Regulation and Supply Isolation
typicAl ApplicAtion
0.9V, 5A Regulator
DROPOUT VOLTAGE (mV)
150
Dropout Voltage
V
IN
= V
OUT(NOMINAL)
V
BIAS
2.2V TO 3.6V
V
IN
1.2V
50k
2.2µF
IN
330µF
EN
V
O0
V
O1
V
O2
NC
1nF
MARGA
VIOC
I
MON
REF/BYP
GND
LT3071
BIAS
PWRGD
SENSE
OUT
PWRGD
120
90
2.2µF*
4.7µF*
V
OUT
0.9V
10µF* 5A
V
OUT
= 1.8V
V
BIAS
= 3.3V
V
OUT
= 0.8V
V
BIAS
= 2.5V
60
30
*X5R OR X7R CAPACITORS
V
MON
2V AT 5A
FULL SCALE
0.01µF
1k
3071 TA01a
0
0
1
3
4
2
OUTPUT CURRENT (A)
5
3071 TA01b
3071f

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