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AS7C31025-15TI

Description
5V/3.3V 128K x8 CMOS SRAM (Revolutionary pinout)
Categorystorage    storage   
File Size112KB,9 Pages
ManufacturerALSC [Alliance Semiconductor Corporation]
Download Datasheet Parametric View All

AS7C31025-15TI Overview

5V/3.3V 128K x8 CMOS SRAM (Revolutionary pinout)

AS7C31025-15TI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerALSC [Alliance Semiconductor Corporation]
Parts packaging codeTSOP2
package instructionTSOP2, TSOP32,.46
Contacts32
Reach Compliance Codeunknow
ECCN code3A991.B.2.B
Maximum access time15 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G32
JESD-609 codee0
length20.95 mm
memory density1048576 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP32,.46
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.0005 A
Minimum standby current2 V
Maximum slew rate0.085 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width10.16 mm
March 2001
®
AS7C1025
AS7C31025
5V/3.3V 128Kx8 CMOS SRAM (Revolutionary pinout)
Features
• AS7C1025 (5V version)
• AS7C31025 (3.3V version)
• Industrial and commercial temperatures
• Organization: 131,072 words × 8 bits
• High speed
- 12/15/20 ns address access time
- 6,7,8 ns output enable access time
• Low power consumption: STANDBY
- 27.5 mW (AS7C1025) / max CMOS (5V)
- 1.8 mW (AS7C31025) / max CMOS (3.3V)
• Low power consumption: ACTIVE
- 715 mW (AS7C1025) / max @ 12 ns (5V)
- 360 mW (AS7C31025) / max @ 12 ns (3.3V)
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• Center power and ground
• TTL/LVTTL-compatible, three-state I/O
• JEDEC-standard packages
- 32-pin, 300 mil SOJ
- 32-pin, 400 mil SOJ
- 32-pin TSOP II
• ESD protection
2000 volts
• Latch-up current
200 mA
Logic block diagram
V
CC
GND
Input buffer
A0
A1
A2
A3
A4
A5
A6
A7
A8
I/O7
Pin arrangement
32-pin TSOP II
A0
A1
A2
A3
CE
I/O0
I/O1
V
CC
GND
I/O2
I/O3
WE
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16
A15
A14
A13
OE
I/O7
I/O6
GND
V
CC
I/O5
I/O4
A12
A11
A10
A9
A8
Row decoder
512×256×8
Array
(1,048,576)
Sense amp
I/O0
WE
OE
CE
Column decoder
A9
A10
A11
A12
A13
A14
A15
A16
Control
circuit
32-pin SOJ (300 mil)
32-pin SOJ (400 mil)
A0
A1
A2
A3
CE
I/O0
I/O1
V
CC
GND
I/O2
I/O3
WE
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16
A15
A14
A13
OE
I/O7
I/O6
GND
V
CC
I/O5
I/O4
A12
A11
A10
A9
A8
Selection guide
AS7C1025-12
AS7C31025-12
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
Shaded areas contain advance information.
AS7C1025-15
AS7C31025-15
15
4
85
85
5
5
AS7C1025
AS7C31025
AS7C1025
AS7C31025
AS7C1025-20
AS7C31025-20
20
5
80
80
5
5
Unit
ns
ns
mA
mA
mA
mA
12
3
AS7C1025
AS7C31025
AS7C1025
AS7C31025
130
100
5
5
3/23/01; v.1.0
Alliance Semiconductor
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Copyright © Alliance Semiconductor. All rights reserved.
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