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PIC18F4580T-E/PT

Description
8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size88KB,6 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Parametric View All

PIC18F4580T-E/PT Overview

8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44

PIC18F4580T-E/PT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMicrochip
Parts packaging codeQFP
package instructionTQFP, TQFP44,.47SQ,32
Contacts44
Reach Compliance Codecompli
ECCN code3A991.A.2
Has ADCYES
Address bus width
bit size8
CPU seriesPIC
maximum clock frequency40 MHz
DAC channelNO
DMA channelNO
External data bus width
JESD-30 codeS-PQFP-G44
JESD-609 codee3
length10 mm
Humidity sensitivity level3
Number of I/O lines36
Number of terminals44
On-chip program ROM width16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeTQFP
Encapsulate equivalent codeTQFP44,.47SQ,32
Package shapeSQUARE
Package formFLATPACK, THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply5 V
Certification statusNot Qualified
RAM (bytes)1536
rom(word)16384
ROM programmabilityFLASH
Maximum seat height1.2 mm
speed40 MHz
Maximum supply voltage5.5 V
Minimum supply voltage4.2 V
Nominal supply voltage4.5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
width10 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER
PIC18F2480/2580/4480/4580
PIC18F2480/2580/4480/4580 Data Sheet Errata
Clarifications/Corrections to the Data
Sheet
In the PIC18F2480/2580/4480/4580 Device Data
Sheet (DS39637C), the following clarifications and cor-
rections should be noted. Any silicon issues related to
this device will reported in a separate silicon errata.
Please check the Microchip web site for any existing
issues.
2. Module: Master Synchronous Serial Port
(MSSP) – Serial Peripheral
Interface (SPI)
The following note has been added to the end of
Section 17.3.3 “Enabling SPI I/O”.
Note:
1. Module: Enhanced Capture/Compare
PWM (ECCP1)
The following note has been added to the end of
Section 16.4.6 “Programmable Dead-Band
Delay”.
When the module is enabled and in
Master mode (CKE, SSPSTAT<6> =
1),
a
small glitch of approximately half a T
CY
may be seen on the SCK pin. To resolve
this, keep the SCK pin as an input while
setting SPEN. Then, configure the SCK
pin as an output (TRISC<3> =
0).
Note:
If the dead-band delay value is increased
after the dead-band time has elapsed, that
new value takes effect immediately. This
happens even if the PWM pulse is high
and can appear to be a glitch.
Dead-band values must be changed
during the dead-band time or before
ECCP is active.
©
2009 Microchip Technology Inc.
DS80267C-page 1

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