Preliminary
DATASHEET
Specifications in this document are tentative and subject to change.
R8C/36W Group, R8C/36X Group, R8C/36Y Group, R8C/36Z Group
REJ03B0315-0010
Rev.0.10
May 17, 2010
RENESAS MCU
1.
1.1
Overview
Features
The R8C/36W Group, R8C/36X Group, R8C/36Y Group, and R8C/36Z Group of single-chip MCUs incorporate
the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1 Mbyte of address
space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for
high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are
designed to maximize EMI/EMS performance.
Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of
system components.
The R8C/36W Group and R8C/36X Group have a single channel CAN module and are suitable for LAN systems in
vehicles and for FA.
The R8C/36Y Group and R8C/36Z Group do not have CAN modules.
The R8C/36W Group and R8C/36Y Group have data flash (1 KB × 4 blocks) with the background operation
(BGO) function.
1.1.1
Applications
Automobiles and others
REJ03B0315-0010 Rev.0.10
May 17, 2010
Page 1 of 68
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
1. Overview
R8C/36W Group, R8C/36X Group, R8C/36Y Group, R8C/36Z Group
1.1.2
Specifications
Tables 1.1 and 1.2 outline the Specifications for R8C/36W Group, tables 1.3 and 1.4 outline the Specifications
for R8C/36X Group, tables 1.5 and 1.6 outline the Specifications for R8C/36Y Group, and tables 1.7 and 1.8
outline the Specifications for R8C/36Z Group.
Table 1.1
Item
CPU
Specifications for R8C/36W Group (1)
Function
Central processing
unit
Specification
R8C CPU core
• Number of fundamental instructions: 89
• Minimum instruction execution time:
50 ns (f(XIN) = 20 MHz, VCC = 2.7 to 5.5 V)
• Multiplier: 16 bits × 16 bits
→
32 bits
• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
→
32 bits
• Operating mode: Single-chip mode (address space: 1 Mbyte)
Refer to
Table 1.9 Product List for R8C/36W Group.
• Power-on reset
• Voltage detection 3 (detection level of voltage detection 1 selectable)
• Input-only: 1 pin
• CMOS I/O ports: 59, selectable pull-up resistor
3 circuits: XIN clock oscillation circuit (with on-chip feedback resistor),
High-speed on-chip oscillator (with frequency adjustment function),
Low-speed on-chip oscillator
• Oscillation stop detection: XIN clock oscillation stop detection function
• Frequency divider circuit: Dividing selectable 1, 2, 4, 8, and 16
• Low power consumption modes:
Standard operating mode (high-speed clock, high-speed on-chip oscillator,
low-speed on-chip oscillator), wait mode, stop mode
• Interrupt vectors: 69
• External: 9 sources (INT × 5, key input × 4)
• Priority levels: 7 levels
• 14 bits × 1 (with prescaler)
• Reset start selectable
• Low-speed on-chip oscillator for watchdog timer selectable
• 1 channel
• Activation sources: 40
• Transfer modes: 2 (normal mode, repeat mode)
Memory
ROM, RAM, Data
flash
Power Supply Voltage detection
Voltage
circuit
Detection
I/O Ports
Programmable I/O
ports
Clock
Clock generation
circuits
Interrupts
Watchdog Timer
DTC (Data Transfer Controller)
REJ03B0315-0010 Rev.0.10
May 17, 2010
Page 2 of 68
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
1. Overview
R8C/36W Group, R8C/36X Group, R8C/36Y Group, R8C/36Z Group
Table 1.2
Item
Timer
Specifications for R8C/36W Group (2)
Function
Timer RA0
Specification
8 bits (with 8-bit prescaler) × 1
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
8 bits (with 8-bit prescaler) × 1
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
8 bits (with 8-bit prescaler) × 1
Timer mode (period timer), programmable waveform generation mode (PWM
output), programmable one-shot generation mode, programmable wait one-
shot generation mode
16 bits (with 4 capture/compare registers) × 1
Timer mode (input capture function, output compare function), PWM mode
(output 3 pins), PWM2 mode (PWM output pin)
16 bits (with 4 capture/compare registers) × 2
Timer mode (input capture function, output compare function), PWM mode
(output 6 pins), reset synchronous PWM mode (output three-phase waveforms
(6 pins), sawtooth wave modulation), complementary PWM mode (output
three-phase waveforms (6 pins), triangular wave modulation), PWM3 mode
(PWM output 2 pins with fixed period)
8 bits × 1
Output compare mode
16 bits × 1
Input capture mode (input capture circuit), output compare mode (output
compare circuit)
16 bits × 1
Timer mode (input capture function, output compare function), PWM mode
(output 1 pin), phase counting mode (available automatic measurement for the
counts of 2-phase encoder)
2 channels
Clock synchronous serial I/O, UART
1 channel
Clock synchronous serial I/O, UART, I
2
C mode (I
2
C-bus), IE mode (IEBus),
multiprocessor communication function
1 channel
Hardware LIN: 2 (timer RA0, timer RA1, UART0, UART1)
1 channel, 16 Mailboxes (conforms to the ISO 11898-1)
10-bit resolution × 16 channels, includes sample and hold function, with sweep
mode
• Programming and erasure voltage: VCC = 2.7 to 5.5 V
• Programming and erasure endurance: 10,000 times (data flash)
1,000 times (program ROM)
• Program security: ROM code protect, ID code check
• Debug functions: On-chip debug, on-board flash rewrite function
• Background operation (BGO) function (data flash)
f(XIN) = 20 MHz (VCC = 2.7 to 5.5 V)
Typ. 7 mA (VCC = 5.0 V, f(XIN) = 20 MHz)
-40 to 85°C (J version)
-40 to 125°C (K version)
(1)
64-pin LQFP
Package code: PLQP0064KB-A (previous code: 64P6Q-A)
Timer RA1
Timer RB
Timer RC
Timer RD
Timer RE
Timer RF
Timer RG
Serial
Interface
UART0, 1
UART2
Synchronous Serial
Communication Unit (SSU)
LIN Module
CAN Module
A/D Converter
Flash Memory
Operating Frequency/Supply
Voltage
Current Consumption
Operating Ambient Temperature
Package
Note:
1. Specify the K version if K version functions are to be used.
REJ03B0315-0010 Rev.0.10
May 17, 2010
Page 3 of 68
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
1. Overview
R8C/36W Group, R8C/36X Group, R8C/36Y Group, R8C/36Z Group
Table 1.3
Item
CPU
Specifications for R8C/36X Group (1)
Function
Central processing
unit
Specification
R8C CPU core
• Number of fundamental instructions: 89
• Minimum instruction execution time:
50 ns (f(XIN) = 20 MHz, VCC = 2.7 to 5.5 V)
• Multiplier: 16 bits × 16 bits
→
32 bits
• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
→
32 bits
• Operating mode: Single-chip mode (address space: 1 Mbyte)
Refer to
Table 1.10 Product List for R8C/36X Group.
• Power-on reset
• Voltage detection 3 (detection level of voltage detection 1 selectable)
• Input-only: 1 pin
• CMOS I/O ports: 59, selectable pull-up resistor
3 circuits: XIN clock oscillation circuit (with on-chip feedback resistor),
High-speed on-chip oscillator (with frequency adjustment function),
Low-speed on-chip oscillator
• Oscillation stop detection: XIN clock oscillation stop detection function
• Frequency divider circuit: Dividing selectable 1, 2, 4, 8, and 16
• Low power consumption modes:
Standard operating mode (high-speed clock, high-speed on-chip oscillator,
low-speed on-chip oscillator), wait mode, stop mode
• Interrupt vectors: 69
• External: 9 sources (INT × 5, key input × 4)
• Priority levels: 7 levels
• 14 bits × 1 (with prescaler)
• Reset start selectable
• Low-speed on-chip oscillator for watchdog timer selectable
• 1 channel
• Activation sources: 40
• Transfer modes: 2 (normal mode, repeat mode)
Memory
ROM, RAM, Data
flash
Power Supply Voltage detection
Voltage
circuit
Detection
I/O Ports
Programmable I/O
ports
Clock
Clock generation
circuits
Interrupts
Watchdog Timer
DTC (Data Transfer Controller)
REJ03B0315-0010 Rev.0.10
May 17, 2010
Page 4 of 68
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
1. Overview
R8C/36W Group, R8C/36X Group, R8C/36Y Group, R8C/36Z Group
Table 1.4
Item
Timer
Specifications for R8C/36X Group (2)
Function
Timer RA0
Specification
8 bits (with 8-bit prescaler) × 1
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
8 bits (with 8-bit prescaler) × 1
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
8 bits (with 8-bit prescaler) × 1
Timer mode (period timer), programmable waveform generation mode (PWM
output), programmable one-shot generation mode, programmable wait one-
shot generation mode
16 bits (with 4 capture/compare registers) × 1
Timer mode (input capture function, output compare function), PWM mode
(output 3 pins), PWM2 mode (PWM output pin)
16 bits (with 4 capture/compare registers) × 2
Timer mode (input capture function, output compare function), PWM mode
(output 6 pins), reset synchronous PWM mode (output three-phase waveforms
(6 pins), sawtooth wave modulation), complementary PWM mode (output
three-phase waveforms (6 pins), triangular wave modulation), PWM3 mode
(PWM output 2 pins with fixed period)
8 bits × 1
Output compare mode
16 bits × 1
Input capture mode (input capture circuit), output compare mode (output
compare circuit)
16 bits × 1
Timer mode (input capture function, output compare function), PWM mode
(output 1 pin), phase counting mode (available automatic measurement for the
counts of 2-phase encoder)
2 channels
Clock synchronous serial I/O, UART
1 channel
Clock synchronous serial I/O, UART, I
2
C mode (I
2
C-bus), IE mode (IEBus),
multiprocessor communication function
1 channel
Hardware LIN: 2 (timer RA0, timer RA1, UART0, UART1)
1 channel, 16 Mailboxes (conforms to the ISO 11898-1)
10-bit resolution × 16 channels, includes sample and hold function, with sweep
mode
• Programming and erasure voltage: VCC = 2.7 to 5.5 V
• Programming and erasure endurance: 100 times (program ROM)
• Program security: ROM code protect, ID code check
• Debug functions: On-chip debug, on-board flash rewrite function
f(XIN) = 20 MHz (VCC = 2.7 to 5.5 V)
Typ. 7 mA (VCC = 5.0 V, f(XIN) = 20 MHz)
-40 to 85°C (J version)
-40 to 125°C (K version)
(1)
64-pin LQFP
Package code: PLQP0064KB-A (previous code: 64P6Q-A)
Timer RA1
Timer RB
Timer RC
Timer RD
Timer RE
Timer RF
Timer RG
Serial
Interface
UART0, 1
UART2
Synchronous Serial
Communication Unit (SSU)
LIN Module
CAN Module
A/D Converter
Flash Memory
Operating Frequency/Supply
Voltage
Current Consumption
Operating Ambient Temperature
Package
Note:
1. Specify the K version if K version functions are to be used.
REJ03B0315-0010 Rev.0.10
May 17, 2010
Page 5 of 68
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