HYMD212G726ALS4M-L datasheet, PDF

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HYMD212G726ALS4M-L: DescriptionLow Profile Registered DDR SDRAM DIMM; Categorystorage storage; File Size227KB，16 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/

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HYMD212G726ALS4M-L Overview

Low Profile Registered DDR SDRAM DIMM

HYMD212G726ALS4M-L Parametric

Parameter Name	Attribute value
Maker	SK Hynix
Parts packaging code	DIMM
package instruction	DIMM, DIMM184
Contacts	184
Reach Compliance Code	compli
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.8 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	125 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N184
memory density	9663676416 bi
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	184
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM184
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum standby current	1.37 A
Maximum slew rate	6.86 mA
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL

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128Mx72 bits

Low Profile Registered DDR SDRAM DIMM

HYMD212G726A(L)S4M-M/K/H/L

DESCRIPTION

Preliminary

Hynix HYMD212G726A(L)S4M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM

Dual In-Line Memory Modules (DIMMs) which are organized as 128Mx72 high-speed memory arrays. Hynix

HYMD212G726A(L)S4M-M/K/H/L series consists of eighteen stacked 128Mx4 DDR SDRAM in 400mil TSOP II packages

on a 184pin glass-epoxy substrate. Hynix HYMD212G726A(L)S4M-M/K/H/L series provide a high performance 8-byte

interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition.

Hynix HYMD212G726A(L)S4M-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous

operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control

inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on

both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high

bandwidth. All input and output voltage levels are compatible with SSTL_2. High speed frequencies, programmable

latencies and burst lengths allow variety of device operation in high performance memory system.

Hynix HYMD212G726A(L)S4M-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect func-

tion is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to

identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

FEATURES

•

1GB (128M x 72) Low Profile Registered DDR DIMM

based on stacked 128Mx4 DDR SDRAM

JEDEC Standard 184-pin dual in-line memory module

(DIMM)

Error Check Correction (ECC) Capability

Registered inputs with one-clock delay

Phase-lock loop (PLL) clock driver to reduce loading

2.5V +/- 0.2V VDD and VDDQ Power supply

All inputs and outputs are compatible with SSTL_2

interface

•

Fully differential clock operations (CK & /CK) with

100MHz/125MHz/133MHz

Programmable CAS Latency 2 / 2.5 supported

Programmable Burst Length 2 / 4 / 8 with both

sequential and interleave mode

tRAS Lock-out function supported

Internal four bank operations with single pulsed RAS

Auto refresh and self refresh supported

8192 refresh cycles / 64ms

ORDERING INFORMATION

Part No.

HYMD212G726A(L)S4M-M

HYMD212G726A(L)S4M-K

HYMD212G726A(L)S4M-H

HYMD212G726A(L)S4M-L

=2.5V

DDQ

=2.5V

Power Supply

Clock Frequency

133MHz (*DDR266:2-2-2)

133MHz (*DDR266A)

133MHz (*DDR266B)

100MHz (*DDR200)

Interface

Form Factor

SSTL_2

184pin Low Profile Registered

DIMM

5.25 x 1.2 x 0.15 inch

* JEDEC Defined Specifications compliant

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.2/May. 02

HYMD212G726ALS4M-L Related Products

	HYMD212G726ALS4M-L	HYMD212G726ALS4M-H	HYMD212G726ALS4M-K	HYMD212G726ALS4M-M	HYMD212G726AS4M-H	HYMD212G726AS4M-L	HYMD212G726AS4M-M
Description	Low Profile Registered DDR SDRAM DIMM	Low Profile Registered DDR SDRAM DIMM	Low Profile Registered DDR SDRAM DIMM	Low Profile Registered DDR SDRAM DIMM	Low Profile Registered DDR SDRAM DIMM	Low Profile Registered DDR SDRAM DIMM	Low Profile Registered DDR SDRAM DIMM
Maker	SK Hynix	SK Hynix	SK Hynix	SK Hynix	SK Hynix	SK Hynix	SK Hynix
Parts packaging code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
package instruction	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184
Contacts	184	184	184	184	184	184	184
Reach Compliance Code	compli	compli	compli	compli	unknow	unknow	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	0.8 ns	0.75 ns	0.75 ns	0.75 ns	0.75 ns	0.8 ns	0.75 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	125 MHz	133 MHz	133 MHz	133 MHz	133 MHz	125 MHz	133 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184
memory density	9663676416 bi	9663676416 bi	9663676416 bi	9663676416 bi	9663676416 bi	9663676416 bi	9663676416 bi
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
memory width	72	72	72	72	72	72	72
Number of functions	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1
Number of terminals	184	184	184	184	184	184	184
word count	134217728 words	134217728 words	134217728 words	134217728 words	134217728 words	134217728 words	134217728 words
character code	128000000	128000000	128000000	128000000	128000000	128000000	128000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	128MX72	128MX72	128MX72	128MX72	128MX72	128MX72	128MX72
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
Encapsulate equivalent code	DIMM184	DIMM184	DIMM184	DIMM184	DIMM184	DIMM184	DIMM184
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
power supply	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192	8192	8192
self refresh	YES	YES	YES	YES	YES	YES	YES
Maximum standby current	1.37 A	1.37 A	1.37 A	1.37 A	1.37 A	1.37 A	1.37 A
Maximum slew rate	6.86 mA	6.86 mA	6.86 mA	7.22 mA	6.86 mA	6.86 mA	7.22 mA
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL

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