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HYMD525G726ALS4M-M

Description
Low Profile Registered DDR SDRAM DIMM
Categorystorage    storage   
File Size292KB,17 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric View All

HYMD525G726ALS4M-M Overview

Low Profile Registered DDR SDRAM DIMM

HYMD525G726ALS4M-M Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSK Hynix
Parts packaging codeDIMM
package instructionDIMM, DIMM184
Contacts184
Reach Compliance Codecompli
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time0.75 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
JESD-30 codeR-XDMA-N184
memory density19327352832 bi
Memory IC TypeDDR DRAM MODULE
memory width72
Number of functions1
Number of ports1
Number of terminals184
word count268435456 words
character code256000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256MX72
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIMM
Encapsulate equivalent codeDIMM184
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.5 V
Certification statusNot Qualified
refresh cycle8192
self refreshYES
Maximum standby current0.18 A
Maximum slew rate6.84 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
256Mx72 bits
Low Profile Registered DDR SDRAM DIMM
HYMD525G726A(L)S4M-M/K/H/L
Document Title
256Mx72 bits Low Profile Registered DDR SDRAM DIMM
Revision History
No.
0.1
0.2
0.3
Initial draft
Dedfined Pin Cap. Spec.
1) Corrected IDD Spec.
2) Corrected some typos
History
Draft Date
Jan. 2003
Dec. 2003
Apr. 2004
Remark
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.3/ Apr. 2004
1
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