FEMTOCLOCK™ CRYSTAL-TO-LVDS
CLOCK GENERATOR
ICS844251-14
Features
•
•
•
•
•
•
•
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One differential LVDS output pair
Crystal oscillator interface designed for 18pF, parallel resonant
crystal (23.2MHz – 30MHz)
Output frequency ranges: 145MHz – 187.5MHz and
580MHz – 750MHz
VCO range: 580MHz – 750MHz
RMS phase jitter at 156.25MHz, using a 25MHz crystal
(1.875MHz – 20MHz): 0.53ps (typical)
Full 3.3V or 2.5V output supply modes
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
General Description
The ICS844251-14 is an Ethernet Clock Generator
and a member of the HiPerClocks
TM
family of high
HiPerClockS™
performance devices from IDT. The ICS844251-14
uses an 18pF parallel resonant crystal over the
range of 23.2MHz – 30MHz. For Ethernet
applications, a 25MHz crystal is used. The device has excellent
<1ps phase jitter performance, over the 1.875MHz – 20MHz
integration range. The ICS844251-14 is packaged in a small 8-pin
TSSOP, making it ideal for use in systems with limited board
space.
ICS
Common Configuration Table
Inputs
Crystal Frequency (MHz)
25
26.67
25 (default)
FREQ_SEL
1
1
0
M
25
25
25
N
1
1
4
Multiplication Value M/N
25
25
6.25
Output Frequency Range
(MHz)
625
666.67
156.25
Block Diagram
FREQ_SEL
Pulldown
Pin Assignment
V
DDA
GND
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
DD
Q
nQ
FREQ_SEL
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
580MHz - 750MHz
FREQ_SEL
0
(default)
1
N
÷4
÷1
Q
nQ
M = ÷25
(fixed)
ICS844251-14
8 Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
IDT™ / ICS™
LVDS CLOCK GENERATOR
1
ICS844251BG-14 REV. A MAY 1, 2009
ICS844251-14
FEMTOCLOCK™CRYSTAL-TO-LVDS CLOCK GENERATOR
Table 1. Pin Descriptions
Number
1
2
3,
4
5
6, 7
8
Name
V
DDA
GND
XTAL_OUT
XTAL_IN
FREQ_SEL
nQ, Q
V
DD
Output
Power
Input
Input
Output
Power
Pulldown
Type
Description
Analog supply pin.
Power supply ground.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Frequency select pin. LVCMOS/LVTTL interface levels.
Differential output pair. LVDS interface levels.
Core supply pin.
NOTE:
Pullup
refers to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLdown
Parameter
Input Capacitance
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
k
Ω
IDT™ / ICS™
LVDS CLOCK GENERATOR
2
ICS844251BG-14 REV. A MAY 1, 2009
ICS844251-14
FEMTOCLOCK™CRYSTAL-TO-LVDS CLOCK GENERATOR
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
DD
Inputs, V
I
Outputs, I
O
Continuos Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
DD
+ 0.5V
10mA
15mA
129.5°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
V
DD
– 0.10
Typical
3.3
3.3
Maximum
3.465
V
DD
100
10
Units
V
V
mA
mA
Table 3B. Power Supply DC Characteristics,
V
DD
= 2.5V ± 5%, T
A
= 0°C to 70°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
2.375
V
DD
– 0.10
Typical
2.5
2.5
Maximum
2.625
V
DD
95
10
Units
V
V
mA
mA
Table 3C. LVCMOS/LVTTL DC Characteristics,
V
DD
= 3.3V ± 5% or 2.5V ± 5%, T
A
= 0°C to 70°C
Symbol
V
IH
Parameter
Input High Voltage
Test Conditions
V
DD
= 3.465V
V
DD
= 2.625V
Input Low Voltage
Input High Current
Input Low Current
V
DD
= 3.465V
V
DD
= 2.625V
V
DD
= V
IN
= 3.465V or 2.625V
V
DD
= 3.465V or 2.625V, V
IN
= 0V
-5
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
150
Units
V
V
V
V
µA
µA
V
IL
I
IH
I
IL
IDT™ / ICS™
LVDS CLOCK GENERATOR
3
ICS844251BG-14 REV. A MAY 1, 2009
ICS844251-14
FEMTOCLOCK™CRYSTAL-TO-LVDS CLOCK GENERATOR
Table 3D. LVDS DC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Symbol
V
OD
∆V
OD
V
OS
∆V
OS
Parameter
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
1.275
Test Conditions
Minimum
247
Typical
Maximum
454
50
1.525
50
Units
mV
mV
V
mV
Table 3E. LVDS DC Characteristics,
V
DD
= V
DDA
= 2.5V ± 5%, T
A
= 0°C to 70°C
Symbol
V
OD
∆V
OD
V
OS
∆V
OS
Parameter
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
1.0
Test Conditions
Minimum
247
Typical
Maximum
454
50
1.4
50
Units
mV
mV
V
mV
Table 4. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
23.2
Test Conditions
Minimum
Typical
Fundamental
30
50
7
MHz
Maximum
Units
Ω
pF
IDT™ / ICS™
LVDS CLOCK GENERATOR
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ICS844251BG-14 REV. A MAY 1, 2009
ICS844251-14
FEMTOCLOCK™CRYSTAL-TO-LVDS CLOCK GENERATOR
AC Electrical Characteristics
Table 5A. AC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Parameter Symbol
f
OUT
Output Frequency
Test Conditions
FREQ_SEL = 0
FREQ_SEL = 1
156.25MHz,
Integration Range: 1.875MHz – 20MHz
625MHz,
Integration Range: 1.875MHz – 20MHz
20% to 80%
FREQ_SEL = 0
FREQ_SEL = 1
70
48
46
Minimum
145
580
0.53
0.45
550
52
54
Typical Maximum
187.5
750
Units
MHz
MHz
ps
ps
ps
%
%
tjit(Ø)
RMS Phase Jitter, Random;
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
t
R
/ t
F
odc
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
NOTE 1: Please refer to Phase Noise Plots.
Table 5B. AC Characteristics,
V
DD
= 2.5V ± 5%, T
A
= 0°C to 70°C
Parameter Symbol
f
OUT
Output Frequency
Test Conditions
FREQ_SEL = 0
FREQ_SEL = 1
156.25MHz,
Integration Range: 1.875MHz – 20MHz
625MHz,
Integration Range: 1.875MHz – 20MHz
20% to 80%
FREQ_SEL = 0
FREQ_SEL = 1
70
48
46
Minimum
145
580
0.54
0.45
550
52
54
Typical Maximum
187.5
750
Units
MHz
MHz
ps
ps
ps
%
%
tjit(Ø)
RMS Phase Jitter, Random;
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
t
R
/ t
F
odc
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
NOTE 1: Please refer to Phase Noise Plots.
IDT™ / ICS™
LVDS CLOCK GENERATOR
5
ICS844251BG-14 REV. A MAY 1, 2009
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