LTC2605/LTC2615/LTC2625
Octal 16-/14-/12-Bit
Rail-to Rail DACs in 16-Lead SSOP
FEATURES
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DESCRIPTION
The LTC
®
2605/LTC2615/LTC2625 are octal 16-, 14- and
12-bit, 2.7V to 5.5V rail-to-rail voltage-output DACs
in 16-lead narrow SSOP packages. They have built-in
high performance output buffers and are guaranteed
monotonic.
These parts establish new board-density benchmarks
for 16-/14-bit DACs and advance performance standards
for output drive, crosstalk and load regulation in single
supply, voltage-output multiples.
The parts use the 2-wire I
2
C compatible serial interface. The
LTC2605/LTC2615/LTC2625 operate in both the standard
mode (maximum clock rate of 100kHz) and the fast mode
(maximum clock rate of 400kHz).
The LTC2605/LTC2615/LTC2625 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero-scale; and after power-up, they stay
at zero-scale until a valid write and update take place. The
power-on reset circuit resets the LTC2605-1/\LTC2615-1/
LTC2625-1 to mid-scale. The voltage output stays at mid-
scale until a valid write and update takes place.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
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Smallest Pin-Compatible Octal DACs:
LTC2605: 16 Bits
LTC2615: 14 Bits
LTC2625: 12 Bits
Guaranteed Monotonic Over Temperature
400kHz I
2
C Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 250μA per DAC at 3V
Individual Channel Power-Down to 1μA (Max)
Ultralow Crosstalk Between DACs (<10μV)
High Rail-to-Rail Output Drive (±15mA, Min)
Double-Buffered Digital Inputs
27 Selectable Addresses
LTC2605/LTC2615/LTC2625: Power-On Reset to
Zero-Scale
LTC2605-1/LTC2615-1/LTC2625-1: Power-On Reset
to Mid-Scale
Tiny 16-Lead Narrow SSOP Package
APPLICATIONS
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Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
TYPICAL APPLICATION
GND
1
REGISTER
REGISTER
REGISTER
REGISTER
16 V
CC
V
OUT A
2
DAC A
DAC H
15 V
OUT H
Differential Nonlinearity (LTC2605)
1.0
0.8
0.6
0.4
V
CC
= 5V
V
REF
= 4.096V
REGISTER
REGISTER
REGISTER
V
OUT B
3
DAC B
REGISTER
DAC G
14 V
OUT G
REGISTER
REGISTER
REGISTER
REGISTER
V
OUT C
4
DAC C
DAC F
13 V
OUT F
DNL (LSB)
0.2
0
–0.2
–0.4
–0.6
REGISTER
REGISTER
REGISTER
V
OUT D
5
DAC D
REGISTER
DAC E
12 V
OUT E
REF
6
32-BIT SHIFT REGISTER
11
CA0
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2605 G02
CA2
7
10
CA1
SCL
2-WIRE INTERFACE
8
9
2605/15/25 BD
SDA
2605fa
1
LTC2605/LTC2615/LTC2625
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
GND
V
OUT A
V
OUT B
V
OUT C
V
OUT D
REF
CA2
SCL
1
2
3
4
5
6
7
8
16 V
CC
15 V
OUT H
14 V
OUT G
13 V
OUT F
12 V
OUT E
11 CA0
10 CA1
9
SDA
Any Pin to GND ............................................ –0.3V to 6V
Any Pin to V
CC
............................................. –6V to 0.3V
Maximum Junction Temperature .......................... 125°C
Operating Temperature Range
LTC2605C/LTC2615C/LTC2625C ............. 0°C to 70°C
LTC2605C-1/LTC2615C-1/LTC2625C-1 .... 0°C to 70°C
LTC2605I/LTC2615I/LTC2625I .............–40°C to 85°C
LTC2605I-1/LTC2615I-1/LTC2625I-1 ....–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 160°C/W
ORDER INFORMATION
LEAD FREE FINISH
LTC2605CGN#PBF
LTC2605CGN-1#PBF
LTC2605IGN#PBF
LTC2605IGN-1#PBF
LTC2615CGN#PBF
LTC2615CGN-1#PBF
LTC2615IGN#PBF
LTC2615IGN-1#PBF
LTC2625CGN#PBF
LTC2625CGN-1#PBF
LTC2625IGN#PBF
LTC2625IGN-1#PBF
TAPE AND REEL
LTC2605CGN#TRPBF
LTC2605CGN-1#TRPBF
LTC2605IGN#TRPBF
LTC2605IGN-1#TRPBF
LTC2615CGN#TRPBF
LTC2615CGN-1#TRPBF
LTC2615IGN#TRPBF
LTC2615IGN-1#TRPBF
LTC2625CGN#TRPBF
LTC2625CGN-1#TRPBF
LTC2625IGN#TRPBF
LTC2625IGN-1#TRPBF
PART MARKING
2605
26051
2605I
2605I1
2615
26151
2615I
2615I1
2625
26251
2625I
2625I1
PACKAGE DESCRIPTION
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
16-Lead Plastic SSOP
TEMPERATURE RANGE
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
2605fa
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LTC2605/LTC2615/LTC2625
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Resolution
Monotonicity
DNL
INL
Differential Nonlinearity
Integral Nonlinearity
Load Regulation
(Note 2)
(Note 2)
(Note 2)
V
REF
= V
CC
= 5V, Mid-Scale
I
OUT
= 0mA to 15mA Sourcing
I
OUT
= 0mA to 15mA Sinking
CONDITIONS
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded,
unless otherwise noted.
LTC2625/LTC2625-1 LTC2615/LTC2615-1 LTC2605/LTC2605-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
12
12
±0.5
±1
±4
±4
0.07
0.10
0.15
0.20
1.7
±1
±5
±0.7
±0.1
±8
±0.7
14
14
±1
±16
0.5
0.5
1
1
9
±9
±18
0.3
0.4
0.6
0.8
1.7
±1
±5
±0.1
±8
±0.7
16
16
±1
±64
2
2
4
4
9
±9
UNITS
Bits
Bits
LSB
LSB
LSB/mA
LSB/mA
LSB/mA
LSB/mA
mV
mV
μV/°C
%FSR
ppm/°C
DC Performance
0.02 0.125
0.03 0.125
0.04
0.07
1.7
±1
±5
0.25
0.25
9
±9
V
REF
= V
CC
= 2.7V, Mid-Scale
I
OUT
= 0mA to 7.5mA Sourcing
l
I
OUT
= 0mA to 7.5mA Sinking
l
ZSE
V
OS
Zero-Scale Error
Offset Error
V
OS
Temperature
Coefficient
GE
Gain Error
Gain Temperature
Coefficient
l
Code = 0
(Note 4)
l
l
±0.1
±8
The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded, unless otherwise noted. (Note 9)
SYMBOL PARAMETER
PSR
R
OUT
Power Supply Rejection
DC Output Impedance
DC Crosstalk (Note 10)
CONDITIONS
V
CC
±10%
V
REF
= V
CC
= 5V, Mid-Scale; –15mA ≤ I
OUT
≤ 15mA
V
REF
= V
CC
= 2.7V, Mid-Scale; –7.5mA ≤ I
OUT
≤ 7.5mA
Due to Full-Scale Output Change (Note 11)
Due to Load Current Change
Due to Powering Down (per Channel)
V
CC
= 5.5V, V
REF
= 5.5V
Code: Zero-Scale; Forcing Output to V
CC
Code: Full-Scale; Forcing Output to GND
V
CC
= 2.7V, V
REF
= 2.7V
Code: Zero-Scale; Forcing Output to V
CC
Code: Full-Scale; Forcing Output to GND
Reference Input
Input Voltage Range
Resistance
Capacitance
I
REF
V
CC
I
CC
Reference Current, Power-Down Mode
Positive Supply Voltage
Supply Current
DAC Powered Down
For Specified Performance
V
CC
= 5V (Note 3)
V
CC
= 3V (Note 3)
DAC Powered Down (Note 3), V
CC
= 5V
DAC Powered Down (Note 3), V
CC
= 3V
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MIN
TYP
–80
0.02
0.03
±10
±3.5
±7
MAX
0.15
0.15
UNITS
dB
Ω
Ω
μV
μV/mA
μV
I
SC
Short-Circuit Output Current
15
15
7.5
7.5
0
11
34
34
20
27
60
60
50
50
V
CC
mA
mA
mA
mA
V
kΩ
pF
μA
V
mA
mA
μA
μA
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Normal Mode
l
16
90
0.001
20
1
5.5
Power Supply
2.7
2.50
2.00
0.38
0.16
4.0
3.2
1.0
1.0
3
LTC2605/LTC2615/LTC2625
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Digital I/O (Note 9)
V
IL
V
IH
V
IL(CA)
V
IH(CA)
R
INH
R
INL
R
INF
V
OL
t
OF
t
SP
I
IN
C
IN
C
B
C
CAn
Low Level Input Voltage (SDA and SCL)
High Level Input Voltage (SDA and SCL)
Low Level Input Voltage (CA0 to CA2)
High Level Input Voltage (CA0 to CA2)
Resistance from CAn (n = 0,1,2) to V
CC
to Set CAn = V
CC
See Test Circuit 1
See Test Circuit 1
See Test Circuit 2
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l
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The
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denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded,
unless otherwise noted. (Note 9)
CONDITIONS
MIN
TYP
MAX
0.3V
CC
0.7V
CC
0.15V
CC
0.85V
CC
10
10
2
0
0.4
250
50
1
10
400
10
UNITS
V
V
V
V
kΩ
kΩ
MΩ
V
ns
ns
μA
pF
pF
pF
Resistance from CAn (n = 0,1,2) to GND See Test Circuit 2
to Set CAn = GND
Resistance from CAn (n = 0,1,2) to V
CC
or GND to Set CAn = FLOAT
Low Level Output Voltage
Output Fall Time
Pulse Width of Spikes Surpassed by
Input Filter
Input Leakage
I/O Pin Capacitance
Capacitance Load for Each Bus Line
External Capacitive Load on Address
Pins CA0, CA1 and CA2
0.1V
CC
≤ V
IN
≤ 0.9V
CC
(Note 12)
See Test Circuit 2
Sink Current = 3mA
V
O
= V
IH(MIN)
to V
O
= V
IL(MAX)
, C
B
= 10pF to 400pF
(Note 7)
l
20 + 0.1CB
l
l
l
l
l
0
The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded, unless otherwise noted.
SYMBOL
t
S
PARAMETER
Settling Time (Note 5)
CONDITIONS
±0.024% (±1LSB at 12 Bits)
±0.006% (±1LSB at 14 Bits)
±0.0015% (±1LSB at 16 Bits)
±0.024% (±1LSB at 12 Bits)
±0.006% (±1LSB at 14 Bits)
±0.0015% (±1LSB at 16 Bits)
LTC2625/LTC2625-1 LTC2615/LTC2615-1 LTC2605/LTC2605-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
7
7
9
2.7
4.8
0.80
1000
12
180
120
100
15
7
9
10
2.7
4.8
5.2
0.80
1000
12
180
120
100
15
UNITS
μs
μs
μs
μs
μs
μs
V/μs
pF
nV•s
kHz
nV/√Hz
nV/√Hz
μV
P-P
AC Performance
Settling Time for 1LSB Step
(Note 6)
Voltage Output Slew Rate
Capacitive Load Driving
Glitch Inpulse
Multiplying Bandwidth
e
n
Output Voltage Noise Density
Output Voltage Noise
2.7
0.80
1000
At Mid-Scale Transition
At f = 1kHz
At f = 10kHz
0.1Hz to 10Hz
12
180
120
100
15
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LTC2605/LTC2615/LTC2625
TIMING CHARACTERISTICS
SYMBOL
f
SCL
t
HD(STA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
t
BUF
PARAMETER
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of the SCL Clock Pin
High Period of the SCL Clock Pin
Set-Up Time for a Repeated Start Program
Data Hold Time
Data Set-Up Time
Rise Time of Both SDA and SCL Signals
Fall Time of Both SDA and SCL Signals
Set-Up Time for Stop Condition
Bus Free Time Between a Stop and Start Condition
(Note 7)
(Note 7)
V
CC
= 2.7V to 5.5V
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. See Figure 1. (Notes 8, 9)
CONDITIONS
MIN
0
0.6
1.3
0.6
0.6
0
100
20 + 0.1CB
20 + 0.1CB
0.6
1.3
300
300
0.9
TYP
MAX
400
UNITS
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2
N
– 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16,
k
L
= 256 and linearity is defined from code 256 to code 65,535.
Note 3:
SDA, SCL at 0V or V
CC
, CA0, CA1 and CA2 floating.
Note 4:
Inferred from measurement at code 256 (LTC2605/LTC2605-1),
code 64 (LTC2615/LTC2615-1) or code 16 (LTC2625/LTC2625-1) and at
full-scale.
Note 5:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4-scale to 3/4-scale and
3/4-scale to 1/4-scale. Load is 2kΩ in parallel with 200pF to GND.
Note 6:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped ±1LSB between half-scale
and half-scale – 1. Load is 2kΩ in parallel with 200pF to GND.
Note 7:
C
B
= capacitance of one bus line in pF
.
Note 8:
All values refer to V
IH(MIN)
and V
IL(MAX)
levels.
Note 9:
These specifications apply to LTC2605/LTC2605-1,
LTC2615/LTC2615-1 and LTC2625/LTC2625-1.
Note 10:
DC Crosstalk is measured with V
CC
= 5V and V
REF
= 4096V, with
the measured DAC at mid-scale, unless otherwise noted.
Note 11:
R
L
= 2kΩ to GND or V
CC
.
Note 12:
Guaranteed by design and not production tested.
ELECTRICAL CHARACTERISTICS
Test Circuit 1
100Ω
CAn
V
IH(CA
n
)
/V
IL(CA
n
)
2605 TC01
Test Circuit 2
V
DD
R
INH
/R
INL
/R
INF
2605 TC02
GND
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Embedded System
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