AS91L1001BU40L100CF datasheet, PDF

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AS91L1001BU40L100CF: DescriptionThe AS91L1006BU is a one to 6-port JTAG gateway; File Size241KB，28 Pages; ManufacturerETC

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AS91L1001BU40L100CF Overview

The AS91L1006BU is a one to 6-port JTAG gateway

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July 2004

AS91L1006BU

6-Port JTAG Gateway

Description

The AS91L1006BU is a one to 6-port

JTAG gateway. It partitions a single JTAG chain

into six separate chains. These separate chains

can be optionally configured to operate as a single

chain.

The AS91L1006BU device is used to

provide enhanced capabilities to the standard

IEEE1149.1. It enables the IEEE1149.1 interface

to be used in a true Multi-Drop environment without

any additional signals. This Multi-Drop capability

enables the standard IEEE1149.1 interface to be

used not just for stand alone PCB (Printed Circuit

Board) testing, but also for complete system

testing including all PCBs within a system back

plane environment.

The AS91L1006BU provides the capability

of partitioning the PCB, into multiple smaller

IEEE1149.1 scan chains totally under software

control. Partitioning the IEEE1149.1 chains on the

PCB has several benefits which include easier

fault diagnostics capabilities as a fault on one of

the IEEE1149.1 Local Scan Ports (LSPs) does

not render the PCB untestable, faster flash

programming on the PCBs, and removal of

IEEE1149.1 signal loading issues.

All of the protocols required for

addressing the AS91L1006BU device via the

Multi-Drop capability and the protocols for

configuring which of the six IEEE1149.1 LSPs on

the AS91L1006BU are to be used, is handled via

party ATPG tools from vendors like Asset-

Intertech and JTAG Technologies. In a Multi-Drop

environment it is also possible to perform

interconnect tests between multiple PCBs within a

system thus extending the interconnect tests to

the back plane itself.

Key Features

Device Multi-Drop addressable via the IEEE

1149.1 protocol

Support for 6 local scan chains addressable via

the IEEE 1149.1 interface

Support for Pass-Through™

Support for the IEEE 1149.1 USERCODE

instruction

Support for Status instruction enabling non-

intrusive monitoring of the system card

Local Scan Port (LSP) enable signal provides the

ability to use non IEEE 1149.1 compliant devices

that require JTAG enable signal

Provides the ability to initiate Self-Test on a

remote PCB via a standard IEEE 1149.1

command

Support for JTAG Technologies AutoWR™

feature

Pinout and feature set compatible (complete

second source) with the Firecron JTS06BU

device

Available in a 100-pin LQFP or a 100-pin

FPBGA lead free package

Device Block Diagram

P a s s T h r o u g h E n a b le

P r im a r y 1 1 4 9 . 1

J T A G In te rfa c e

LSP1

S ta tu s D a ta

LSP2

U s e rc o d e

D a ta

1 1 4 9 . 1 T A P C o n t r o lle r

and

B o u n d a r y R e g is t e r S e le c t io n L o g ic

D e v ic e

a d d re s s

P a s s T h ro u g h

L o g ic & L o c a l

S c a n P o rt

C o n n e c t io n /

C o n f ig

lo g ic

LSP3

LSP4

D e v ic e

S e le c t io n

L o g ic

L o c a l S c a n P o rt

P a r k /U n -p a rk

S y n c L o g ic

LSP5

LSP6

Figure 1 - AS91L1006BU Device Block Diagram

Alliance Semiconductor

2575 Augustine Drive

•

Santa Clara, CA 95054

•

T: 408-855-4900

•

F: 408-855-4999

•

www.alsc.com

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