XR18W753
SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER
MARCH 2008
REV. 1.0.0
GENERAL DESCRIPTION
The XR18W753 is a low-power, single-chip RF
transceiver designed to operate in license-free
European 868 MHz SRD, North American / Australian
915 MHz ISM bands.
Digital I/Q modulation,
demodulation and direct sequence spread spectrum
techniques were employed to provide robust data
transmission in signal congested RF environments.
The device provides extensive hardware support for
packet handling such as frame timing, data buffering,
RSSI/ED/LQI for clear channel assessment, and FCS
and CRC hardware for error detection. TX output
power is programmable from -24 dBm to 0 dBm with
100 Kbps and 250 Kbps O-QPSK data supported.
APPLICATIONS
FEATURES
•
2.2 to 3.6 Volt Operation
•
868 MHz to 956 MHz
•
Direct-Sequence-Spread-Spectrum Transceiver
•
Direct-up-conversion I/Q modulator
•
Low-IF I/Q digital receiver
•
Superior blocking/desensitization performance
•
RSSI / ED / LQI for clear channel assessment
•
FCS computation and CRC for error detection
•
Low BOM cost and ease of production
•
I
2
C Interface to data buffer and internal registers
•
Fully integrated loop filter with few external
components needed (crystal, capacitors, antenna
and matching networks)
•
Industrial/Home automation, monitoring and control
•
Point of sales and data collection terminals
•
Entertainment, game, toy, robot, and remote control
•
Active RFID, asset tracking and keyless entry
•
Lighting, HVAC energy management
•
Automatic meter reading
•
Wireless sensor and telemetry networks
F
IGURE
1. RF TRANSCEIVER BLOCK DIAGRAM
•
Programmable TX output power in 3 dB steps
•
Receiver sensitivity of -94 dBm at 100 Kbps
•
Supports O-QPSK 100 Kbps and 250 Kbps data
•
Industrial temperature (-40 to +85
o
C)
•
48-pin QFN package
1Mz
6 H
XA
TL
VE_L_N
R GCK E
1Mz
6 H
CK
L
T
X
DT
AA
B FE
UF R
CO K
L C
GNRT N
E E A IO
V lta e
o g
R g la r
e u to
CC
R
P
L
M
E
cae_ ay
c _ d re d
p k_ _ a y
c tx re d
p k_ c iv d
c re e e
p e re d
lm _ a y
SL
C
SA
D
D ita
ig l
Md m
oe
R
F
M tc in
a h g
N tw rk
e o
DT
AA
ACS
CES
C NR LE
O T OL R
R
X
DT
AA
B FE
UF R
Md m
oe
C n lle
o tro r
M d mC n l &S tu
o e o tro
ta s
IR #
Q
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
•
(510) 668-7000
•
FAX (510) 668-7017
•
www.exar.com
XR18W753
SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER
F
IGURE
2. RF SYSTEM ARCHITECTURE
REV. 1.0.0
ADC
I/Q
DIV
IF Filter
1
st
Stage
IF Filter
2
nd
Stage
7
LNA
DIGITAL
MODEM
ADC
7
AGC
RF
LO
SYNTH
Digital
Backend
ADC
6
PA
I/Q
DIV
ADC
6
DET
PA Gain
2
XR18W753
REV. 1.0.0
SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER
F
IGURE
3.
PIN DIAGRAM
AGND 1
AVDD19 2
AGND 3
AVDD19 4
RFCM1 5
RFIN+ 6
RFIN- 7
RFCM2 8
AVDD19 9
AGND 10
AVDD19 11
AGND 12
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
AVDD19
AVDD19
AVDD19
AVDD_OUT
AVDD
DVDD
DVDD_OUT
AGND
XTAL1
XTAL2
AVDD19
VREG_CLK_EN
XR18W753
MODEM_RESET
CLK_OUT-
CLK_OUT+
A3
A2
TEST2
TEST1
IRQ#
A1
A0
SDA
SCL
ORDERING INFORMATION
P
ART
N
UMBER
XR18W753IL48
P
ACKAGE
48-Lead QFN
O
PERATING
T
EMPERATURE
R
ANGE
-40°C to +85°C
D
EVICE
S
TATUS
Active
R1-
R1+
AVDD19
AGND
VDD_VCO
AGND
ATI+
ATI-
ATO+
ATO-
DGND
TEST0
13
14
15
16
17
18
19
20
21
22
23
24
3
XR18W753
SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER
REV. 1.0.0
PIN DESCRIPTIONS
N
AME
AGND
AVDD19
AGND
AVDD19
RFCM1
RFIN+
RFIN-
RFCM2
AVDD19
AGND
AVDD
AGND
R1-
R1+
AVDD19
AGND
VDD_VCO
AGND
ATI+
ATI-
ATO+
ATO-
DGND
TEST0
SCL
SDA
A0
A1
IRQ#
TEST1
P
IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
T
YPE
Ground
Power I
Ground
Power I
Analog O
Analog I/O
Analog I/O
Analog O
Power I
Ground
Power I
Ground
Analog I/O
Power I
Ground
Analog O
Ground
Analog I
Analog I
Analog O
Analog O
Ground
Digital I
Digital OD
DigitaI OD
Digital I
Digital I
Digital O
Digital I
D
ESCRIPTION
Analog ground for IF part of RX and BB part of TX
Analog VDD (1.9V ± 0.1V) for IF part of RX and BB part of TX.
Analog ground for RX frontend and PA
Analog VDD (1.9V ± 0.1V) for LNA and PA.
Common Mode voltage output for matching network.
Voltage output TX: 1.9V RX:
≈
170mV
Differential RF signals
Common Mode voltage output for matching network.
Voltage output TX: 1.9V RX:
≈
170mV
Analog VDD (1.9V ± 0.1V) for LNA and PA.
Analog ground for RX frontend and PA
Analog VDD (1.9V ± 0.1V) for LNA and PA.
Analog ground for IF part of RX and BB part of TX.
External resistor to fix PA power. 470 ohm resistor connected between
R1- and R1+ is recommended.
Analog VDD (1.9V ± 0.1V) for synthesizer.
Analog ground for synthesizer.
VDD of VCO. VDD = 1.9V ± 0.1V (for decoupling).
Analog ground for VCO.
Analog Test Input
Analog Test Input
Analog Test Output
Analog Test Output
Digital ground
Factory Test Mode. For normal operation, this pin should be connected
to GND.
Open-drain I2C serial clock
Open-drain I2C serial data
I2C Address bit-0
I2C Address bit-1
Interrupt output (active low, open-drain).
Factory Test Mode. For normal operation, this pin should be connected
to GND.
4
XR18W753
REV. 1.0.0
SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER
P
IN
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
T
YPE
Digital I
Digital I
Digital I
Digital O
Digital O
Digital I
Digital I
Power I
Analog I
Analog I
Ground
Power O
Power I
Power I
Power O
Power I
Power I
Power I
Ground
D
ESCRIPTION
Factory Test Mode. For normal operation, this pin should be connected
to GND.
I2C Address bit-2
I2C Address bit-3. This address line should be connected to GND.
16 MHz LVDS digital clock outputs. Connect pin 35 to ground for
CMOS clock output.
Digital modem reset (active high, level sensitive).
Voltage Regulator and crystal oscillator enable (active high, level sensi-
tive)
VDD (1.9V ± 0.1V) for crystal oscillator and clock divider.
16MHz crystal input or external clock input. Based on typical PCB stray
capacitance, a 27 pF capacitor to GND is recommended.
Crystal output, 27 pF capacitor to GND is recommended. If an external
clock is used at XTAL1, this input should be left unconnected.
Ground for crystal oscillator and buffers.
Decoupling pin for digital VDD, 10 nF capacitor to GND recommended.
Digital Power Supply, DVDD = 2.2 - 3.6V. DVDD and AVDD should use
the same power supply. 100nF capacitor to GND recommended.
Analog Power Supply, AVDD = 2.2 - 3.6V. DVDD and AVDD should use
the same power supply. 100nF capacitor to GND recommended.
1.9V stabilized analog VDD output. This output should be connected to
all AVDD19 pins. 1uF ceramic capacitor to GND recommended.
Analog VDD (1.9V ± 0.1V) for ADC and DAC.
Analog VDD (1.9V ± 0.1V) for ADC.
Analog VDD (1.9V ± 0.1V) for IF strip, TX mixers and both I/Q dividers.
The center pad on the backside of the 48-QFN package is metallic and
is not electrically connected to anything inside the device. It must be
soldered on to the PCB and may be optionally connected to GND on the
PCB. The thermal pad size on the PCB should be the approximate size
of this center pad and should be solder mask defined. The solder mask
opening should be at least 0.0025" inwards from the edge of the PCB
thermal pad.
N
AME
TEST2
A2
A3
CLK_OUT+
CLK_OUT-
MODEM_RESET
VREG_CLK_EN
AVDD19
XTAL1
XTAL2
AGND
DVDD_OUT
DVDD
AVDD
AVDD_OUT
AVDD19
AVDD19
AVDD19
PADDLE
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
5
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