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MT5C2564EC-70L/IT

Description
64K x 4 SRAM SRAM MEMORY ARRAY
File Size86KB,12 Pages
ManufacturerAUSTIN
Websitehttp://www.austinsemiconductor.com/
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MT5C2564EC-70L/IT Overview

64K x 4 SRAM SRAM MEMORY ARRAY

SRAM
Austin Semiconductor, Inc.
64K x 4 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-88681
• SMD 5962-88545
• MIL-STD-883
MT5C2564
PIN ASSIGNMENT
(Top View)
FEATURES
High Speed: 15, 20, 25, 35, 45, 55, and 70
Battery Backup: 2V data retention
Low power standby
High-performance, low-power, CMOS double-metal
process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
Vss
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
DQ1
WE\
A1
A0
NC
Vcc
NC
24-Pin DIP (C)
(300 MIL)
28-Pin LCC (EC)
3 2 1 28 27
A2
A3
A4
A5
A6
A7
A8
A9
CE\
4
5
6
7
8
9
10
11
12
26
25
24
23
22
21
20
19
18
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
13 14 15 16 17
DQ1
WE\
NC
Vss
NC
28-Pin Flat Pack (F)
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
NC
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OPTIONS
• Timing
15ns access
20ns access
25ns access
35ns access
45ns access
55ns access
70ns access
• Package(s)
Ceramic DIP (300 mil)
Ceramic LCC
Ceramic Flatpack
MARKING
-15
-20
-25
-35
-45
-55*
-70*
Vcc
A15
A14
A13
A12
A11
A10
NC
NC
DQ3
DQ2
DQ1
DQ0
WE\
C
EC
F
No. 106
No. 204
GENERAL DESCRIPTION
• Operating Temperature Ranges
Industrial (-40
o
C to +85
o
C)
IT
o
o
Military (-55 C to +125 C)
XT
• 2V data retention/low power
L
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS and are fabricated using double-
layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Austin Semiconductor offers chip enable (CE\) on all
organizations. This enhancement can place the outputs in
High-Z for additional flexibility in system design. The x4
configuration features common data input and output.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is
accomplished when WE\ remains HIGH and CE\ goes LOW.
The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
These devices operate from a single +5V power
supply and all inputs and outputs are fully TTL compatible.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
*Electrical characteristics identical to those provided for the 45ns
access devices.
For more products and information
please visit our web site at
www.austinsemiconductor.com
MT5C2564
Rev. 3.1 6/05
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