Stratix V Device Datasheet
SV53001-3.6
This document covers the electrical and switching characteristics for Stratix
®
V
devices. Electrical characteristics include operating conditions and power
consumption. Switching characteristics include transceiver specifications, core, and
periphery performance. This document also describes I/O timing, including
programmable I/O element (IOE) delay and programmable output buffer delay.
f
For information regarding the densities and packages of devices in the Stratix V
family, refer to the
Stratix V Device Overview.
Electrical Characteristics
The following sections describe the electrical characteristics of Stratix V devices.
Operating Conditions
When you use Stratix V devices, they are rated according to a set of defined
parameters. To maintain the highest possible performance and reliability of Stratix V
devices, you must consider the operating requirements described in this chapter.
Stratix V devices are offered in commercial and industrial temperature grades.
Commercial devices are offered in –1 (fastest), –2, –3, and –4 core speed grades.
Industrial devices are offered in –2, –3, and –4 core speed grades. Stratix V E devices
are offered based on core speed grades while Stratix V GX, GS, and GT devices are
also offered in -1, -2, and -3 transceiver speed grades.
Table 1
lists the industrial and commercial speed grades for the Stratix V GX and
Stratix V GS devices.
Table 1. Stratix V GX and GS Commercial and Industrial Speed Grade Offering
Transceiver Speed
Grade
1
GX channel—14.1 Gbps
2
GX channel—12.5 Gbps
Core Speed Grade
C1
Yes
Yes
C2, C2L
Yes
Yes
C3
—
Yes
C4
—
—
I2, I2L
Yes
Yes
I3, I3L
—
Yes
I3YY
—
—
I4
—
—
(1), (2), (3)
(Part 1 of 2)
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December 2015
Altera Corporation
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Page 2
Electrical Characteristics
Table 1. Stratix V GX and GS Commercial and Industrial Speed Grade Offering
Transceiver Speed
Grade
3
GX channel—8.5 Gbps
Notes to
Table 1:
(1) C = Commercial temperature grade; I = Industrial temperature grade.
(2) Lower number refers to faster speed grade.
(3) C2L, I2L, and I3L speed grades are for low-power devices.
(4) I3YY speed grades can achieve up to 10.3125 Gbps.
(1), (2), (3)
(Part 2 of 2)
Core Speed Grade
C1
—
C2, C2L
Yes
C3
Yes
C4
Yes
I2, I2L
—
I3, I3L
Yes
I3YY
Yes
(4)
I4
Yes
Table 2
lists the industrial and commercial speed grades for the Stratix V GT devices.
Table 2. Stratix V GT Commercial and Industrial Speed Grade Offering
Transceiver Speed Grade
C1
2
GX channel—12.5 Gbps
GT channel—28.05 Gbps
3
GX channel—12.5 Gbps
GT channel—25.78 Gbps
Notes to
Table 2:
(1) C = Commercial temperature grade; I = Industrial temperature grade.
(2) Lower number refers to faster speed grade.
(1), (2)
Core Speed Grade
C2
Yes
I2
—
I3
—
Yes
Yes
Yes
Yes
Yes
Absolute Maximum Ratings
Absolute maximum ratings define the maximum operating conditions for Stratix V
devices. The values are based on experiments conducted with the devices and
theoretical modeling of breakdown and damage mechanisms. The functional
operation of the device is not implied for these conditions.
c
Conditions other than those listed in
Table 3
may cause permanent damage to the
device. Additionally, device operation at the absolute maximum ratings for extended
periods of time may have adverse effects on the device.
Table 3. Absolute Maximum Ratings for Stratix V Devices (Part 1 of 2)
Symbol
V
CC
V
CCPT
V
CCPGM
V
CC_AUX
V
CCBAT
V
CCPD
V
CCIO
Description
Power supply for core voltage and periphery circuitry
Power supply for programmable power technology
Power supply for configuration pins
Auxiliary supply for the programmable power technology
Battery back-up power supply for design security volatile key register
I/O pre-driver power supply
I/O power supply
Minimum
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
Maximum
1.35
1.8
3.9
3.4
3.9
3.9
3.9
Unit
V
V
V
V
V
V
V
Stratix V Device Datasheet
December 2015
Altera Corporation
Electrical Characteristics
Page 3
Table 3. Absolute Maximum Ratings for Stratix V Devices (Part 2 of 2)
Symbol
V
CCD_FPLL
V
CCA_FPLL
V
I
T
J
T
STG
PLL digital power supply
PLL analog power supply
DC input voltage
Operating junction temperature
Storage temperature (No bias)
Description
Minimum
–0.5
–0.5
–0.5
–55
–65
Maximum
1.8
3.4
3.8
125
150
Unit
V
V
V
°C
°C
Table 4
lists the absolute conditions for the transceiver power supply for Stratix V GX,
GS, and GT devices.
Table 4. Transceiver Power Supply Absolute Conditions for Stratix V GX, GS, and GT Devices
Symbol
V
CCA_GXBL
V
CCA_GXBR
V
CCA_GTBR
V
CCHIP_L
V
CCHIP_R
V
CCHSSI_L
V
CCHSSI_R
V
CCR_GXBL
V
CCR_GXBR
V
CCR_GTBR
V
CCT_GXBL
V
CCT_GXBR
V
CCT_GTBR
V
CCL_GTBR
V
CCH_GXBL
V
CCH_GXBR
Description
Transceiver channel PLL power supply (left side)
Transceiver channel PLL power supply (right side)
Transceiver channel PLL power supply (right side)
Transceiver hard IP power supply (left side)
Transceiver hard IP power supply (right side)
Transceiver PCS power supply (left side)
Transceiver PCS power supply (right side)
Receiver analog power supply (left side)
Receiver analog power supply (right side)
Receiver analog power supply for GT channels (right side)
Transmitter analog power supply (left side)
Transmitter analog power supply (right side)
Transmitter analog power supply for GT channels (right side)
Transmitter clock network power supply (right side)
Transmitter output buffer power supply (left side)
Transmitter output buffer power supply (right side)
Devices
GX, GS, GT
GX, GS
GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GT
GX, GS, GT
GX, GS, GT
GT
GT
GX, GS, GT
GX, GS, GT
Minimum
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
Maximum
3.75
3.75
3.75
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.8
1.8
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage shown in
Table 5
and
undershoot to –2.0 V for input currents less than 100 mA and periods shorter than
20 ns.
December 2015
Altera Corporation
Stratix V Device Datasheet
Page 4
Electrical Characteristics
Table 5
lists the maximum allowed input overshoot voltage and the duration of the
overshoot voltage as a percentage of device lifetime. The maximum allowed
overshoot duration is specified as a percentage of high time over the lifetime of the
device. A DC signal is equivalent to 100% of the duty cycle. For example, a signal that
overshoots to 3.95 V can be at 3.95 V for only ~21% over the lifetime of the device; for
a device lifetime of 10 years, the overshoot duration amounts to ~2 years.
Table 5. Maximum Allowed Overshoot During Transitions
Symbol
Description
Condition (V)
3.8
3.85
3.9
3.95
Vi (AC)
AC input voltage
4
4.05
4.1
4.15
4.2
Overshoot Duration as %
@ T
J
= 100°C
100
64
36
21
12
7
4
2
1
Unit
%
%
%
%
%
%
%
%
%
Stratix V Device Datasheet
December 2015
Altera Corporation
Electrical Characteristics
Page 5
Recommended Operating Conditions
This section lists the functional operating limits for the AC and DC parameters for
Stratix V devices.
Table 6
lists the steady-state voltage and current values expected
from Stratix V devices. Power supply ramps must all be strictly monotonic, without
plateaus.
Table 6. Recommended Operating Conditions for Stratix V Devices (Part 1 of 2)
Symbol
Description
Core voltage and periphery circuitry power
supply (C1, C2, I2, and I3YY speed grades)
V
CC
Core voltage and periphery circuitry power
supply (C2L, C3, C4, I2L, I3, I3L, and I4
speed grades)
(3)
Power supply for programmable power
technology
Auxiliary supply for the programmable
power technology
I/O pre-driver (3.0 V) power supply
I/O pre-driver (2.5 V) power supply
I/O buffers (3.0 V) power supply
I/O buffers (2.5 V) power supply
I/O buffers (1.8 V) power supply
V
CCIO
I/O buffers (1.5 V) power supply
I/O buffers (1.35 V) power supply
I/O buffers (1.25 V) power supply
I/O buffers (1.2 V) power supply
Configuration pins (3.0 V) power supply
V
CCPGM
V
CCA_FPLL
V
CCD_FPLL
V
CCBAT
V
I
V
O
T
J
(2)
Condition
—
Min
(4)
0.87
Typ
0.9
Max
(4)
0.93
Unit
V
—
0.82
0.85
0.88
V
V
CCPT
V
CC_AUX
V
CCPD
(1)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Commercial
Industrial
1.45
2.375
2.85
2.375
2.85
2.375
1.71
1.425
1.283
1.19
1.14
2.85
2.375
1.71
2.375
1.45
1.2
–0.5
0
0
–40
1.50
2.5
3.0
2.5
3.0
2.5
1.8
1.5
1.35
1.25
1.2
3.0
2.5
1.8
2.5
1.5
—
—
—
—
—
1.55
2.625
3.15
2.625
3.15
2.625
1.89
1.575
1.45
1.31
1.26
3.15
2.625
1.89
2.625
1.55
3.0
3.6
V
CCIO
85
100
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
Configuration pins (2.5 V) power supply
Configuration pins (1.8 V) power supply
PLL analog voltage regulator power supply
PLL digital voltage regulator power supply
Battery back-up power supply (For design
security volatile key register)
DC input voltage
Output voltage
Operating junction temperature
December 2015
Altera Corporation
Stratix V Device Datasheet
FPGA/CPLD
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