EEWORLDEEWORLDEEWORLD

Part Number

Search

EPA445-21-LF

Description
8 Pin DIP Dual TTL Compatible Active Delay Lines
Categorylogic    logic   
File Size15KB,1 Pages
ManufacturerPCA Electronics Inc.
Websitehttp://www.pca.com/
Environmental Compliance
Download Datasheet Parametric View All

EPA445-21-LF Overview

8 Pin DIP Dual TTL Compatible Active Delay Lines

EPA445-21-LF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPCA Electronics Inc.
Parts packaging codeDIP
package instructionDIP,
Contacts8/6
Reach Compliance Codecompliant
Other featuresMAX RISE TIME CAPTURED
seriesTTL/H/L
Input frequency maximum value (fmax)47.619 MHz
JESD-30 codeR-PDIP-T6
JESD-609 codee3
Logic integrated circuit typeACTIVE DELAY LINE
Number of functions2
Number of taps/steps1
Number of terminals6
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
programmable delay lineNO
Certification statusNot Qualified
Maximum seat height6.35 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTIN
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Total delay nominal (td)21 ns
width7.62 mm
Base Number Matches1
8 Pin DIP Dual
TTL Compatible Active Delay Lines
ELECTRONICS INC.
EPA445-XX & EPA445-XX-LF
Add “-LF” after part number for Lead-Free
PCA
Part Number
EPA445-18(-LF)
EPA445-19(-LF)
EPA445-20(-LF)
EPA445-21(-LF)
EPA445-22(-LF)
EPA445-23(-LF)
EPA445-24(-LF)
EPA445-25(-LF)
EPA445-30(-LF)
EPA445-35(-LF)
EPA445-40(-LF)
EPA445-45(-LF)
EPA445-50(-LF)
Delay Time
*
18
19
20
21
22
23
24
25
30
35
40
45
50
PCA
Part Number
EPA445-55(-LF)
EPA445-60(-LF)
EPA445-65(-LF)
EPA445-70(-LF)
EPA445-75(-LF)
EPA445-80(-LF)
EPA445-85(-LF)
EPA445-90(-LF)
EPA445-95(-LF)
EPA445-100(-LF)
EPA445-150(-LF)
EPA445-200(-LF)
EPA445-250(-LF)
Delay Time
*
55
60
65
70
75
80
85
90
95
100
150
200
250
PCA
Part Number
EPA445-5(-LF)
EPA445-6(-LF)
EPA445-7(-LF)
EPA445-8(-LF)
EPA445-9(-LF)
EPA445-10(-LF)
EPA445-11(-LF)
EPA445-12(-LF)
EPA445-13(-LF)
EPA445-14(-LF)
EPA445-15(-LF)
EPA445-16(-LF)
EPA445-17(-LF)
Delay Time
*
5±1
6±1
7±1
8±1
9±1
10 ± 1.5
11 ± 1.5
12 ± 1.5
13 ± 1.5
14 ± 1.5
15
16
17
Delay Times referenced from input to leading edges at 25°C, 5.0V, with no load.
* Unless otherwise specified, delay tolerance is ± 2 nS or ± 5%, whichwver is greater.
DC Electrical Characteristics
Parameter
VOH
VOL
VIK
IIH
High-Level Output Voltage
Low-Level Output Voltage
Input Clamp Voltage
High-Level Input Current
Test Conditions
Min.
Max.
0.5
-1.2
50
1.0
-2
-100
Unit
V
V
V
µA
mA
mA
mA
Schematic
V CC = min. V IL = max. I OH = max 2.7
V CC = min. V IH = min. I OL = max
V CC = min. II = II K
V CC = max. VIN = 2.7V
V CC = max. VIN = 5.25V
IIL
Low-Level Input Current
V CC = max. VIN = 0.5V
IOS
Short Circuit Output Current V CC = max. V OUT = 0.
-40
(One output at a time)
ICCH High-Level Supply Current
V CC = max. VIN = OPEN
ICCL Low-Level Supply Current
V CC = max. VIN = 0
TRO Output Rise Time
Td
500 nS (0.75 to 2.4 Volts)
NH
Fanout High-Level Output
V CC = max. V OH = 2.7V
NL
Fanout Low-Level Output
V CC = max. V OL = 0.5V
8
VCC
7
5
1
3
4 GROUND
90
mA
90
mA
4
nS
20 TTL Load
10 TTL Load
.100
(2.54)
White Dot
Pin#1
Package
Recommended Operating Conditions Min.
VCC
VIH
VIL
IIK
IOH
IOL
PW*
d*
TA
Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Current
High-Level Output Current
Low-Level Output Current
Pulse Width of Total Delay
Duty Cycle
Operating Free-Air Temperature
4.75
2.0
Max.
5.25
0.8
-18
-1.0
20
Unit
V
V
V
mA
mA
mA
%
%
°C
PCA
.280
EPA445-X(-LF) Max.
D.C.
(7.11)
.100
(2.54)
.500 Max.
(12.70)
All unused pins are omitted
40
0
40
+70
.250 Max.
(6.35)
.020
Typ.
(.508)
.020
Typ.
(.508)
.010
Typ.
(.254)
*These two values are inter-dependent.
.120 Min,
(3.05))
.365
Max.
(9.27)
Input Pulse Test Conditions @ 25° C
EIN
PW
TRI
PRR
VCC
Pulse Input Voltage
Pulse Width % of Total Delay
Pulse Rise Time (0.75 - 2.4 Volts)
Pulse Repetition Rate
Supply Voltage
3.2
110
2.0
1.0
5.0
Unit
Volts
%
nS
MHz
Volts
Notes :
1. Lead Finish
2. Peak Solder Rating
(Wave Solder Process)
EPA445-XX
SnPb
260°C
10 (+2/-0) seconds
EPA445-XX-LF
Hot Tin Dip (Sn)
260°C
10 (+2/-0) seconds
4. Weight
5. Packaging Information
(Tube)
TBD grams
TBD pieces/tube
TBD grams
TBD pieces/tube
Unless Otherwise Specified Dimensions are in Inches /mm ± .010 /.25
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
Product performance is limited to specified parameters. Data is subject to change without prior notice.
CSA445-XX & -LF
Rev. 2
1/29/08 RR
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com
Release some development boards DEMO boards
As shown in the picture; specific information needs to be found online!...
whctx Buy&Sell
What are the microcontrollers with USB or SPI or IIC? Are there any 51 series? Which ones are cheaper? Urgent!!!!!!!!!!!!!!!!!!
What are the single chip microcomputers with USB, SPI or IIC? Are there any 51 series? Which ones are cheaper? Urgent! ! ! ! ! ! ! ! [/size]...
94169916 Embedded System
How to solve the following error when building CCS5 program
**** Build of configuration Debug for project tms320vc5509a ****"C:\\ti\\ccsv5\\utils\\bin\\gmake" -k all'Building target: tms320vc5509a.out' 'Invoking: C5500 Linker' "C:/ti/ccsv5/tools/compiler/c5500...
XIUJIE DSP and ARM Processors
MSP430 Programming Problem
Hello everyone, I have a problem that I can't solve. I would like to ask the experts for help. I edited the program under IAR EW430 version 5.52 before, but the firmware of the emulator I bought later...
stellarman Microcontroller MCU
Noise suppression technology for LTE powered devices
[p=20, null, left][font=Verdana, sans-serif][size=4][color=#000000][backcolor=white][b]Foreword[/b] In recent years, with the diversification of wireless communication services such as online games an...
wstt Power technology
After Cadence 16.5 Concept HDL schematic is packaged and reversed, the power and ground networks are displayed in red
After Cadence 16.5 Concept HDL schematics are packaged and back-annotated, the power and ground networks are displayed in red, as shown in the figure. What is the reason? How to eliminate it?...
文心雕龙7 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1990  845  1792  1800  1191  41  18  37  24  56 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号