DISCRETE SEMICONDUCTORS
DATA SHEET
book, halfpage
M3D109
PBSS4480X
80 V, 4 A
NPN low V
CEsat
(BISS) transistor
Product data sheet
Supersedes data of 2004 Aug 5
2004 Oct 25
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low V
CEsat
(BISS) transistor
FEATURES
•
High h
FE
and low V
CEsat
at high current operation
•
High collector current capability: I
C
maximum 4 A
•
High efficiency leading to less heat generation.
APPLICATIONS
•
Medium power peripheral drivers; e.g. fan, motor
•
Strobe flash units for DSC and mobile phones
•
Inverter applications; e.g. TFT displays
•
Power switch for LAN and ADSL systems
•
Medium power DC-to-DC conversion
•
Battery chargers.
DESCRIPTION
NPN low V
CEsat
transistor in a SOT89 (SC-62) plastic
package.
PNP complement: PBSS5480X.
PINNING
PIN
1
2
3
emitter
collector
base
QUICK REFERENCE DATA
SYMBOL
V
CEO
I
C
I
CM
R
CEsat
PARAMETER
collector current (DC)
peak collector current
equivalent
on-resistance
PBSS4480X
MAX.
4
10
54
UNIT
V
A
A
mΩ
collector-emitter voltage 80
DESCRIPTION
2
MARKING
3
TYPE NUMBER
PBSS4480X
Note
1. * = p: made in Hong Kong.
* = t: made in Malaysia.
* = W: made in China.
MARKING
CODE
(1)
1
*1Y
3
2
1
sym042
Fig.1 Simplified outline (SOT89) and symbol.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
PBSS4480X
−
DESCRIPTION
plastic surface mounted package; collector pad for good heat
transfer; 3 leads
VERSION
SOT89
2004 Oct 25
2
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low V
CEsat
(BISS) transistor
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
V
CBO
V
CEO
V
EBO
I
C
I
CRM
I
CM
I
B
I
BM
P
tot
PARAMETER
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current (DC)
repetitive peak collector current
peak collector current
base current (DC)
peak base current
total power dissipation
t
≤
300
μs
T
amb
≤
25
°C
notes 1 and 2
note 2
note 3
note 4
note 5
T
j
T
amb
T
stg
Notes
1. Operated under pulsed conditions; pulse width t
p
≤
10 ms; duty cycle
δ ≤
0.2.
junction temperature
ambient temperature
storage temperature
−
−
−
−
−
−
−65
−65
CONDITIONS
open emitter
open base
open collector
note 4
t
p
≤
10 ms;
δ ≤
0.1
−
−
−
−
−
−
−
MIN.
PBSS4480X
MAX.
80
80
5
4
6
10
1
2
2.5
550
1
1.4
1.6
150
+150
+150
UNIT
V
V
V
A
A
A
A
A
W
mW
W
W
W
°C
°C
°C
t = 1 ms or limited by T
j(max)
−
2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint.
3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm
2
.
4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm
2
.
5. Device mounted on a 7 cm
2
ceramic printed-circuit board, 1 cm
2
single-sided copper and tin-plated. For other
mounting conditions, see
“Thermal considerations for SOT89 in the General Part of associated Handbook”.
2004 Oct 25
3
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low V
CEsat
(BISS) transistor
PBSS4480X
1600
P
tot
(mW)
1200
(2)
(1)
001aaa229
800
(3)
400
0
−50
0
50
100
150
200
T
amb
(°C)
(1) FR4 PCB; 6 cm
2
mounting pad for collector.
(2) FR4 PCB; 1 cm
2
mounting pad for collector.
(3) FR4; standard footprint.
Fig.2
Power derating curves.
2004 Oct 25
4
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low V
CEsat
(BISS) transistor
THERMAL CHARACTERISTICS
SYMBOL
R
th(j-a)
PARAMETER
CONDITIONS
PBSS4480X
VALUE
50
225
125
90
80
16
UNIT
K/W
K/W
K/W
K/W
K/W
K/W
thermal resistance from junction in free air
to ambient
notes 1 and 2
note 2
note 3
note 4
note 5
R
th(j-s)
Notes
thermal resistance from junction
to soldering point
1. Operated under pulsed conditions; pulse width t
p
≤
10 ms; duty cycle
δ ≤
0.2.
2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint.
3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm
2
.
4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm
2
.
5. Device mounted on a 7 cm
2
ceramic printed-circuit board, 1 cm
2
single-sided copper and tin-plated. For other
mounting conditions, see
“Thermal considerations for SOT89 in the General Part of associated Handbook”.
10
3
Z
th
(K/W)
10
2
(1)
(2)
(3)
(4)
(5)
(6)
006aaa232
10
(7)
(8)
(9)
1
(10)
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
Mounted on FR4 printed-circuit board; standard footprint.
(1)
δ
= 1.
(2)
δ
= 0.75.
(3)
δ
= 0.5.
(4)
δ
= 0.33.
(5)
δ
= 0.2.
(6)
δ
= 0.1.
(7)
δ
= 0.05.
(8)
δ
= 0.02.
(9)
δ
= 0.01.
(10)
δ
= 0.
Fig.3 Transient thermal impedance as a function of pulse time; typical values.
2004 Oct 25
5
京公网安备 11010802033920号
EEWORLD
