LMU16GC20 datasheet, PDF - EEWORLD Datasheet

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LMU16GC20: DescriptionMultiplier, 16-Bit, CMOS, CPGA68, CERAMIC, PGA-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size591KB，7 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LMU16GC20 Overview

Multiplier, 16-Bit, CMOS, CPGA68, CERAMIC, PGA-68

LMU16GC20 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	PGA
package instruction	PGA, PGA68,11X11
Contacts	68
Reach Compliance Code	unknown
ECCN code	3A001.A.3
boundary scan	NO
maximum clock frequency	50 MHz
External data bus width	16
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	29.4386 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
Output data bus width	32
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	3.81 mm
Maximum slew rate	25 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	29.4386 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, MULTIPLIER

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LMU16GC20 Related Products

	LMU16GC20	LMU16GC25	LMU16DC45
Description	Multiplier, 16-Bit, CMOS, CPGA68, CERAMIC, PGA-68	Multiplier, 16-Bit, CMOS, CPGA68, CERAMIC, PGA-68	Multiplier, 16-Bit, CMOS, CDIP64, SIDE BRAZED, HERMETIC SEALED, DIP-64
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	LOGIC Devices	LOGIC Devices	LOGIC Devices
Parts packaging code	PGA	PGA	DIP
package instruction	PGA, PGA68,11X11	PGA, PGA68,11X11	DIP, DIP64,.9
Contacts	68	68	64
Reach Compliance Code	unknown	unknown	unknown
boundary scan	NO	NO	NO
maximum clock frequency	50 MHz	40 MHz	22.22 MHz
External data bus width	16	16	16
JESD-30 code	S-CPGA-P68	S-CPGA-P68	R-CDIP-T64
JESD-609 code	e0	e0	e0
length	29.4386 mm	29.4386 mm	81.28 mm
low power mode	NO	NO	NO
Humidity sensitivity level	3	3	3
Number of terminals	68	68	64
Maximum operating temperature	70 °C	70 °C	70 °C
Output data bus width	32	32	32
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	DIP
Encapsulate equivalent code	PGA68,11X11	PGA68,11X11	DIP64,.9
Package shape	SQUARE	SQUARE	RECTANGULAR
Package form	GRID ARRAY	GRID ARRAY	IN-LINE
Peak Reflow Temperature (Celsius)	225	225	225
power supply	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.81 mm	3.81 mm	3.81 mm
Maximum slew rate	25 mA	25 mA	25 mA
Maximum supply voltage	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	NO	NO	NO
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	PIN/PEG	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	29.4386 mm	29.4386 mm	22.86 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, MULTIPLIER	DSP PERIPHERAL, MULTIPLIER	DSP PERIPHERAL, MULTIPLIER
ECCN code	3A001.A.3	3A991.A.2	-

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