October 2003
rev 1.0
ASM161 / ASM162
µP Supervisory Circuit
Key Features
monitor
power
supplies
in
•
•
•
•
•
•
Edge triggered manual reset input
single pulse output
49µS minimum MR disable period after reset
CMOS/TTL logic or switch interface
Debounced input
Low supply current extends battery life
• 6µA / 15µA typ/max at 5.5V
• 4.5µA / 10µA typ/max at 3.6V
Long reset period
• 0.8 sec minimum, 2 sec maximum
Two reset polarity options
• ASM161: Active LOW, open-drain
• ASM162: Active HIGH
Pinout matches the AS811/812
Small 4-Pin SOT-143 package
Two temperature ranges: 0
0
to 70
0
c and -40
0
c to +85
0
c
General Description
The ASM161 and ASM162 are cost effective, low power
supervisory
circuits
that
microprocessor, microcontroller and digital systems. If the
power supply drops below the reset threshold level, a reset is
asserted and remains asserted for atleast 800ms after V
CC
has
risen above the reset threshold. An improved manual reset
architecture gives the system designer additional flexibility.
The debounced manual reset input is negative edge triggered.
The reset pulse period generated by a MR transition is a
minimum of 800 ms and a maximum of 2 sec duration. In
addition, The MR input signal is blocked for an additional 49µS
minimum after the reset pulse ends. During the MR disable
period, the microcontroller is guaranteed a time period free of
additional manual reset signals. During this period DRAM
contents can be refreshed or other critical system tasks
undertaken. Low power consumption makes the ASM161/162
ideal for use in portable and battery operated equipments. With
3V supplies power consumption is 8µW typically and 30µW
maximum. The ASM161 has an open-drain, active-LOW
RESET output and requires an external pull-up resistor. The
ASM162 has an active HIGH RESET output.
The ASM161/162 are offered in compact 4-pin SOT-143
packages. No external components are required to trim
threshold voltage for monitoring different supply voltages. With
six different factory set, reset, threshold ranges from 2.63V to
4.63V, the ASM161/162 are suitable for monitoring 5V, 3.6V
and 3.0V supplies. The ASM161/162 are available in
temperature ranges 0 to 70 c and -40 c to +85 c.
Reset Threshold
Part Suffix
L
M
J
T
S
R
Voltage (V)
4.63
4.38
4.00
3.08
2.93
2.63
0
0
0
0
•
•
•
•
•
Applications
•
•
•
•
•
•
•
PDAs
Appliances
Computers and embedded controllers
Wireless communication systems
Battery operated and intelligent instruments
Automotive systems
Safety systems
Typical Operating Circuit
V
CC
V
CC
ASM161
(ASM162)
RESET
(RESET)
MR
GND
20k for
ASM161
only
V
CC
RESET
(RESET)
µP
GND
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
October 2003
rev 1.0
ASM161 / ASM162
Block Diagram
V
CC
4
Voltage
Divider
-
+
Bandgap
Reference
ASM161/162
Reset Circuit
* Edge Trigger
2
RESET (ASM161)
RESET (ASM162)
V
CC
4
ASM161
~
~
R
PU
2
3
MR
MR
Debounce
Reset
Circuit
* Non-retriggerable, edge
triggered manual reset
1
GND
Pin Configuration
SOT-143
GND
1
4
V
CC
GND
1
~
~
SOT-143
4
V
CC
ASM161
ASM162
RESET
2
3
MR
RESET
2
3
MR
RESET is open drain
Pin Description
Pin #
Pin Name
ASM161
1
ASM162
1
GND
Ground.
Active-LOW, open-drain reset output. RESET remains LOW while V
CC
is below the
2
-
RESET
reset threshold and for 800ms minimum after V
CC
rises above the reset threshold.
An external pull-up resistor is needed.
-
2
RESET
Active HIGH reset output. RESET remains HIGH while V
CC
is below the reset
threshold and for 800ms after V
CC
rises above the reset threshold.
Manual reset input. A negative going edge transition on MR asserts reset. Reset
remains asserted for one reset time-out period (800 ms min). This active-LOW
input has an internal pull-up resistor. It can be driven from a TTL or CMOS logic line
or shorted to ground with a switch. Leave open if unused.
Power supply input voltage.
Description
3
3
MR
4
4
V
CC
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice
2 of 9
October 2003
rev 1.0
ASM161 / ASM162
The MR pin must be taken HIGH and LOW again after the
t
MRD
period has been completed to initiate another reset
pulse.
The manual reset input has an internal 20kΩ pull-up resistor.
MR can be left open if not used.
Detailed Descriptions
The reset function ensures the microprocessor is properly
reset and powers up into a known condition after a power
failure.
Reset Timing
A reset is generated whenever the supply voltage is below
the threshold level (V
CC
< V
TH
). The reset duration is at least
800ms after V
CC
has risen above the reset threshold and is
guaranteed to be no more than 2 seconds. The rest signal
remains active as long as the monitored supply voltage is
below the internal threshold voltage.
t
MD
*........
MR
Triggering
Pulse
MR input is blocked
Ready
for
next
MR
t
MRD
Reset
Time-Out
RESET
*Second and following edges ignored
The ASM161 has an open-drain, active LOW RESET output
(which is guaranteed to be in the correct state for V
CC
down
to 1.1 V). The ASM161 uses an external pull-up resistor.
Output leakage current is under 1µA. A high resistance value
can be used to minimize current drain.
The ASM162 generates an active-HIGH RESET output.
Figure 1: Manual Reset Timing
Application Information
Glitch Resistance
The ASM161/162 are relatively immune to short duration
negative-going V
CC
transients/glitches. A V
CC
transient that
goes 100mV below the reset threshold and lasts 20s or less
will not typically cause a reset pulse.
Part Number
ASM161
ASM162
Manual Reset
Reset Polarity
LOW (use external pull-up resistor)
HIGH
Power Supply
V
CC
100KΩ
ASM162
MR
RESET
GND
The ASM161/162 have a unique manual reset circuit. A
negative going edge transition on MR initiates the reset. A
manual reset generates a single reset pulse of fixed length.
The output-reset pulse remains asserted for the Reset Active
Time-Out Period t
RP
and then clears. Once the reset pulse is
completed, the MR input remains disabled for at least 49µS
but not more than 122µS. This period is specified as t
MRD
.
During the MR disabled period, the microcontroller is
guaranteed a time period free of new manual reset signals.
This period can be used to refresh critical DRAM contents or
other system tasks.
Figure 2: RESET valid with VCC under 1.1V
Valid Reset with V
CC
under 1.1V
To ensure that logic inputs connected to the ASM162 RESET
pin are in a known state when V
CC
is under 1.1V, a 100kΩ
pull-down resistor at RESET is needed. The value is not
critical.
This scheme does not work with the open-drain outputs of
ASM161.
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice
3 of 9
October 2003
rev 1.0
ASM161 / ASM162
Absolute Maximum Ratings
Parameter
Pin Terminal Voltage with respect to Ground
V
CC
RESET, RESET and MR
Input Current at V
CC
and MR
Rate of Rise at V
CC
Power Dissipation (T
A
= 70°C)
Operating Temperature Range
Storage Temperature Range
-40
-65
-0.3
-0.3
6.0
V
CC
+ 0.3
20
100
320
85
160
V
V
mA
V/µs
mW
°C
°C
Min
Max
Unit
Lead Temperature (soldering, 10 sec)
300
°C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum rat-
ings for prolonged time periods may affect device reliability.
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice
4 of 9
October 2003
rev 1.0
ASM161 / ASM162
Electrical Characteristics
Unless otherwise noted, V
CC
is over the full range and TA = 0
0
to 70
0
c for ASM161/162 X C and T
A
= -40
0
c to +85
0
c for ASM161/
162 X E devices. Typical values at T
A
= 25
0
c, V
CC
= 5V for L/M/J devices, V
CC
= 3.3V for T/S devices and V
CC
= 3V for R devices
Parameter
Input Voltage (V
CC
)
Range
Supply Current
(Unloaded)
Symbol
V
CC
Conditions
T
A
= 0°C to 70°C
T
A
= 0°C to 70°C,
I
CC
T
A
= -40°C to +85°C
T
A
= 0°C to 70°C,
T
A
= -40°C to +85°C
L Devices
V
CC
< 5.5V,
L/M/J
V
CC
< 3.6V,
Min
1.1
6
4.5
4.56
4.50
4.31
4.25
3.93
3.89
3.04
3.00
2.89
2.85
2.59
2.55
30
V
CC
= V
TH
to (V
TH
-100mV)
t
RPW
T
A
= 0°C to 70°C
T
A
= -40°C to 85°C
800
560
10
100
t
MD
0.5
20
1400
2000
ms
2240
µS
ns
µs
2.63
2.93
3.08
4.00
4.38
4.63
Typ
Max
5.5
15
µA
10
4.70
4.75
4.45
4.50
4.06
4.10
3.11
3.15
2.96
3.00
2.66
2.70
ppm/
°C
µS
V
Unit
V
R/S/T
T
A
= 25°C
Note 1
M devices
T
A
= 25°C
Note 1
J devices
Reset Threshold
V
TH
T
A
= 25°C
Note 1
T devices
T
A
= 25°C
Note 1
S devices
T
A
= 25°C
Note 1
R devices
T
A
= 25°C
Note 1
Reset Threshold Temp
Coefficient
V
CC
to reset delay
Reset Pulse Width
MR Minimum Pulse
Width
MR Glitch Immunity
MR to RESET Propaga-
tion Delay
T
CVTH
t
MR
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice
5 of 9
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