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N74ALS00AN

Description
NAND Gate, TTL, PDIP14,
Categorylogic    logic   
File Size100KB，8 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
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N74ALS00AN Overview

NAND Gate, TTL, PDIP14,

N74ALS00AN Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instructionDIP, DIP14,.3
Reach Compliance Codeunknown
JESD-30 codeR-PDIP-T14
JESD-609 codee0
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.008 A
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5 V
Maximum supply current (ICC)3 mA
Prop。Delay @ Nom-Sup11 ns
Certification statusNot Qualified
Schmitt triggerNO
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL

N74ALS00AN Preview

INTEGRATED CIRCUITS
74ALS00A
Quad 2-Input NAND gate
Product specification
IC05 Data Handbook
1991 Feb 08
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74ALS00A
TYPE
74ALS00A
TYPICAL
PROPAGATION DELAY
4.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
1.0mA
PIN CONFIGURATION
1A
1B
1Y
1
2
3
4
5
6
7
14 V
CC
13 4B
12 4A
11 4Y
10 3B
9
8
3A
3Y
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
74ALS00AN
74ALS00AD
74ALS00ADB
DRAWING
NUMBER
2A
2B
2Y
GND
14-pin plastic DIP
14-pin plastic SO
14-pin plastic SSOP
Type II
SOT27-1
SOT108-1
SOT337-1
SC00001
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
nA, nB
nY
Data inputs
Data output
DESCRIPTION
74ALS (U.L.)
HIGH/LOW
1.0/1.0
20/80
LOAD VALUE
HIGH/LOW
20µA/0.1mA
0.4mA/8mA
NOTE:
One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
1
&
3
1
2
4
5
9
10
12
13
2
4
6
1A 1B 2A 2B 3A 3B 4A 4B
5
9
1Y 2Y 3Y 4Y
8
10
12
3
V
CC
= Pin 14
GND = Pin 7
6
8
11
11
13
SC00002
SF00004
LOGIC DIAGRAM
1A
1B
2A
2B
3A
3B
4A
V
CC
= Pin 14
GND = Pin 7
4B
1
2
4
5
9
10
12
13
3
1Y
FUNCTION TABLE
INPUTS
nA
H
L
8
3Y
OUTPUT
nB
H
X
L
nY
L
H
H
6
2Y
X
H = High voltage level
L = Low voltage level
X = Don’t care
SC00003
11
4Y
1991 Feb 08
2
853–0038 01670
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74ALS00A
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
16
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN
V
CC
V
IH
V
IL
I
Ik
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
4.5
2.0
0.8
–18
–0.4
8
+70
LIMITS
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
V
OH
V
O
OL
V
IK
I
I
I
IH
I
IL
I
O
I
CC
PARAMETER
High-level output voltage
Low level output voltage
Low-level
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Output current
3
Supply current (total)
I
CCH
I
CCL
TEST CONDITIONS
1
V
CC
±10%,
V
IL
= MAX, V
IH
= MIN, I
OH
= –0.4mA
V
CC
= MIN, V
IL
= MAX,
,
,
V
IH
= MIN
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX, V
O
= 2.25V
V
CC
= MAX
V
I
= GND
V
I
= 4.5V
-30
0.5
1.5
I
OL
= 4mA
I
OL
= 8mA
LIMITS
MIN
V
CC
– 2
0.25
0.35
-0.73
0.40
0.50
-1.5
0.1
20
-0.1
-112
0.85
3.0
TYP
2
MAX
UNIT
V
V
V
V
mA
µA
mA
mA
mA
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. The output conditions have been chosen to produce a current that closely approximate one half of the true short-circuit output current, I
OS
.
1991 Feb 08
3
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74ALS00A
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
Propagation delay
nA, nB to nY
Waveform 1
2.0
2.0
MAX
11.0
8.0
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.3V.
nA, nB
V
M
t
PHL
V
M
t
PLH
V
M
V
M
nY
SC00004
Waveform 1. Propagation Delay for Data to Output
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0.3V
90%
AMP (V)
t
TLH (
t
r
)
90%
t
THL (
t
f
)
AMP (V)
90%
V
M
t
w
10%
0.3V
Test Circuit for Totem-pole Outputs
POSITIVE
PULSE
10%
V
M
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Family
Amplitude V
M
74ALS
3.5V
1.3V
Rep.Rate
1MHz
t
w
500ns
t
TLH
2.0ns
t
THL
2.0ns
SC00005
1991 Feb 08
4
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74ALS00A
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
1991 Feb 08
5
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

N74ALS00AN Related Products

N74ALS00AN N74ALS00AD
Description NAND Gate, TTL, PDIP14, NAND Gate, TTL, PDSO14,
Is it Rohs certified? incompatible incompatible
Maker Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.)
package instruction DIP, DIP14,.3 SOP, SOP14,.25
Reach Compliance Code unknown unknown
JESD-30 code R-PDIP-T14 R-PDSO-G14
JESD-609 code e0 e0
Logic integrated circuit type NAND GATE NAND GATE
MaximumI(ol) 0.008 A 0.008 A
Number of terminals 14 14
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP SOP
Encapsulate equivalent code DIP14,.3 SOP14,.25
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE SMALL OUTLINE
power supply 5 V 5 V
Maximum supply current (ICC) 3 mA 3 mA
Prop。Delay @ Nom-Sup 11 ns 11 ns
Schmitt trigger NO NO
Nominal supply voltage (Vsup) 5 V 5 V
surface mount NO YES
technology TTL TTL
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE GULL WING
Terminal pitch 2.54 mm 1.27 mm
Terminal location DUAL DUAL

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