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KM48V8104BS-5

Description
EDO DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, TSOP2-32
Categorystorage    storage   
File Size386KB,21 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

KM48V8104BS-5 Overview

EDO DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, TSOP2-32

KM48V8104BS-5 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeTSOP2
package instructionTSOP2, TSOP32,.46
Contacts32
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFAST PAGE WITH EDO
Maximum access time50 ns
Other featuresRAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O typeCOMMON
JESD-30 codeR-PDSO-G32
JESD-609 codee0
length20.95 mm
memory density67108864 bit
Memory IC TypeEDO DRAM
memory width8
Number of functions1
Number of ports1
Number of terminals32
word count8388608 words
character code8000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8MX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP32,.46
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
refresh cycle4096
Maximum seat height1.2 mm
Maximum standby current0.0005 A
Maximum slew rate0.12 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
KM48V8004B, KM48V8104B
CMOS DRAM
8M x 8bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 8,388,608 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal
or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh
capabilities. Furthermore, Self-refresh operation is available in L-version. This 8Mx8 EDO Mode DRAM family is fabricated using Sam-
sung′s advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Part Identification
- KM48V8004B/B-L(3.3V, 8K Ref.)
- KM48V8104B/B-L(3.3V, 4K Ref.)
Active Power Dissipation
Unit : mW
Speed
-45
-5
-6
Refresh Cycles
Part
NO.
KM48V8004B*
KM48V8104B
Refresh
cycle
8K
4K
Refresh time
Normal
64ms
L-ver
128ms
RAS
CAS
W
• Extended Data Out Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• +3.3V±0.3V power supply
4K
468
432
396
8K
360
324
288
FUNCTIONAL BLOCK DIAGRAM
Control
Clocks
Vcc
Vss
VBB Generator
Refresh Control
Refresh Counter
Memory Array
8,388,608 x 8
Cells
Sense Amps & I/O
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
¡Ü
Refresh Timer
Row Decoder
Data in
Buffer
DQ0
to
DQ7
Data out
Buffer
OE
Performance Range:
Speed
-45
-5
-6
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
74ns
84ns
104ns
t
HPC
17ns
20ns
25ns
A0~A12
(A0~A11)*1
A0~A9
(A0~A10)*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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