M53620805BT0-C60 datasheet, PDF

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M53620805BT0-C60: DescriptionFast Page DRAM Module, 8MX36, 60ns, CMOS, SIMM-72; Categorystorage storage; File Size389KB，20 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/

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M53620805BT0-C60 Overview

Fast Page DRAM Module, 8MX36, 60ns, CMOS, SIMM-72

M53620805BT0-C60 Parametric

Parameter Name	Attribute value
Maker	SAMSUNG
Parts packaging code	SIMM
package instruction	SIMM, SSIM72
Contacts	72
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FAST PAGE
Maximum access time	60 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O type	COMMON
JESD-30 code	R-XSMA-N72
memory density	301989888 bit
Memory IC Type	FAST PAGE DRAM MODULE
memory width	36
Number of functions	1
Number of ports	1
Number of terminals	72
word count	8388608 words
character code	8000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8MX36
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	SIMM
Encapsulate equivalent code	SSIM72
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
power supply	5 V
Certification status	Not Qualified
refresh cycle	4096
Maximum standby current	0.006 A
Maximum slew rate	0.306 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	SINGLE

M53620805BT0-C60 Preview

DRAM MODULE

M53620805BY0/BT0-C

4Byte 8Mx36 SIMM

(4Mx16 & Quad CAS 4Mx4 base)

Revision 0.1

June 1998

DRAM MODULE

Revision History

Version 0.0 (Sept. 1997)

M53620805BY0/BT0-C

• Removed two AC parameters t

CACP

(access time from CAS) and t

AAP

(access time from col. addr.) in

AC CHARACTERISTICS.

Version 0.1 (June 1998)

• The 3rd.(4th.) generation of 64M(16M) DRAM components are applied for this module.

DRAM MODULE

M53620805BY0/BT0-C

M53620805BY0/BT0-C Fast Page Mode

8M x 36 DRAM SIMM Using 4Mx16 & Quad CAS 4Mx4, 4K Refresh, 5V

GENERAL DESCRIPTION

The Samsung M53620805BY0/BT0-C is a 8Mx36bits

Dynamic RAM high density memory module. The Samsung

M53620805BY0/BT0-C consists of four CMOS 4Mx16bits

and two CMOS Quad CAS 4Mx4bits DRAMs in TSOP pack-

ages mounted on a 72-pin glass-epoxy substrate. A 0.1 or

0.22uF decoupling capacitor is mounted on the printed circuit

board for each DRAM. The M53620805BY0/BT0-C is a Sin-

gle In-line Memory Module with edge connections and is

intended for mounting into 72 pin edge connector sockets.

FEATURES

• Part Identification

- M53620805BY0-C(4K cycles/64ms Ref, TSOP, Solder)

- M53620805BT0-C(4K cycles/64ms Ref, TSOP, Gold)

• Fast Page Mode Operation

• CAS-before-RAS & Hidden Refresh capability

• RAS-only refresh capability

• TTL compatible inputs and outputs

• Single +5V±10% power supply

• JEDEC standard PDpin & pinout

• PCB : Height(1000mil), double sided component

PERFORMANCE RANGE

Speed

-C50

-C60

t

RAC

50ns

60ns

t

CAC

13ns

15ns

t

RC

90ns

110ns

t

PC

35ns

40ns

PIN CONFIGURATIONS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

Symbol

V

SS

DQ0

DQ18

DQ1

DQ19

DQ2

DQ20

DQ3

DQ21

Vcc

NC

A0

A1

A2

A3

A4

A5

A6

A10

DQ4

DQ22

DQ5

DQ23

DQ6

DQ24

DQ7

DQ25

A7

A11

Vcc

A8

A9

RAS3

RAS2

DQ26

DQ8

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

Symbol

DQ17

DQ35

Vss

CAS0

CAS2

CAS3

CAS1

RAS0

RAS1

NC

W

NC

DQ9

DQ27

DQ10

DQ28

DQ11

DQ29

DQ12

DQ30

DQ13

DQ31

Vcc

DQ32

DQ14

DQ33

DQ15

DQ34

DQ16

NC

PD1

PD2

PD3

PD4

NC

Vss

PIN NAMES

Pin Name

A0 - A11

DQ0 - 35

W

RAS0 - RAS3

CAS0 - CAS3

PD1 -PD4

Vcc

Vss

NC

Function

Address Inputs

Data In/Out

Read/Write Enable

Row Address Strobe

Column Address Strobe

Presence Detect

Power(+5V)

Ground

No Connection

PRESENCE DETECT PINS (Optional)

PD1

PD2

PD3

PD4

50NS

NC

Vss

60NS

NC

Vss

NC

SAMSUNG ELECTRONICS CO., LTD.

reserves the right to

change products and specifications without notice.

DRAM MODULE

FUNCTIONAL BLOCK DIAGRAM

DQ0 - DQ7

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

U0

M53620805BY0/BT0-C

RAS0/RAS2

47Ω

CAS0

47Ω

CAS1

RAS

LCAS

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ9 - DQ16

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

U3

RAS

RAS1/RAS3

LCAS

UCAS

DQ8

DQ9

DQ10

DQ11

OE

DQ12

DQ13

DQ14

W A0-A11 DQ15

UCAS

OE

W A0-A11

RAS

CAS0

CAS1

CAS2

CAS3

W A0-A11

U1

DQ8,17,26,35

DQ0

DQ1

DQ2

DQ3

DQ0

DQ1

DQ2

DQ3

U4

RAS

CAS0

CAS1

CAS2

CAS3

W A0-A11

DQ18 - DQ25

RAS

47Ω

CAS2

47Ω

CAS3

UCAS

LCAS

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

U2

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ27 - DQ34

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

U5

RAS

LCAS

DQ8

DQ9

DQ10

DQ11

OE

DQ12

DQ13

DQ14

W A0-A11 DQ15

UCAS

OE

W A0-A11

W

A0-A11

Vcc

0.1 or 0.22uF Capacitor

for each DRAM

Vss

To all DRAMs

DRAM MODULE

ABSOLUTE MAXIMUM RATINGS *

Item

Voltage on any pin relative to V

SS

Voltage on V

CC

supply relative to V

SS

Storage Temperature

Power Dissipation

Short Circuit Output Current

Symbol

V

IN

, V

OUT

V

CC

T

stg

P

d

I

OS

M53620805BY0/BT0-C

Rating

-1 to +7.0

-55 to +125

6

50

Unit

V

°C

W

mA

* Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to

the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for intended

periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

(Voltage referenced to V

SS

, T

A

= 0 to 70°C)

Item

Supply Voltage

Ground

Input High Voltage

Input Low Voltage

Symbol

V

CC

V

SS

V

IH

V

IL

Min

4.5

0

2.4

-1.0

*2

Typ

5.0

0

-

Max

5.5

0

V

CC*1

0.8

Unit

V

*1 : V

CC

+2.0V at pulse width≤20ns, which is measured at V

CC

.

*2 : -2.0V at pulse width≤20ns, which is measured at V

SS

.

DC AND OPERATING CHARACTERISTICS

(Recommended operating conditions unless otherwise noted)

Symbol

I

CC1

I

CC2

I

CC3

I

CC4

I

CC5

I

CC6

I

I(L)

I

O(L)

V

OH

V

OL

Speed

-50

-60

Don′t care

-50

-60

-50

-60

Don′t care

-50

-60

Don′t care

M53620805BY0/BT0

Min

-

Max

336

306

12

336

306

226

196

6

336

306

10

-

0.4

Unit

mA

uA

V

-

-10

2.4

-

I

CC1

: Operating Current * (RAS, CAS, Address cycling @

t

RC

=min)

I

CC2

: Standby Current (RAS=CAS=W=V

IH

)

I

CC3

: RAS Only Refresh Current * (CAS=V

IH

, RAS cycling @

t

RC

=min)

I

CC4

: Fast Page Mode Current * (RAS=V

IL

, CAS cycling :

t

PC

=min)

I

CC5

: Standby Current (RAS=CAS=W=Vcc-0.2V)

I

CC6

: CAS-Before-RAS Refresh Current * (RAS and CAS cycling @

t

RC

=min)

I(

IL)

: Input Leakage Current (Any input 0≤V

IN

≤Vcc+0.5V,

all other pins not under test=0 V)

I(

OL)

: Output Leakage Current(Data Out is disabled, 0V≤V

OUT

≤Vcc)

V

OH

: Output High Voltage Level (I

OH

= -5mA)

V

OL

: Output Low Voltage Level (I

OL

= 4.2mA)

* NOTE

: I

CC1

, I

CC3

, I

CC4

and I

CC6

are dependent on output loading and cycle rates. Specified values are obtained with the output open.

I

CC

is specified as an average current. In I

CC1

and I

CC3

, address can be changed maximum once while RAS=V

IL

. In I

CC4

,

address can be changed maximum once within one Fast page mode cycle time,

t

PC

.

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M53620805BT0-C60 Related Products

	M53620805BT0-C60	M53620805BT0-C50	M53620805BY0-C50	M53620805BY0-C60
Description	Fast Page DRAM Module, 8MX36, 60ns, CMOS, SIMM-72	Fast Page DRAM Module, 8MX36, 50ns, CMOS, SIMM-72	Fast Page DRAM Module, 8MX36, 50ns, CMOS, SIMM-72	Fast Page DRAM Module, 8MX36, 60ns, CMOS, SIMM-72
Maker	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG
Parts packaging code	SIMM	SIMM	SIMM	SIMM
package instruction	SIMM, SSIM72	SIMM, SSIM72	SIMM, SSIM72	SIMM, SSIM72
Contacts	72	72	72	72
Reach Compliance Code	compliant	compliant	compliant	compli
ECCN code	EAR99	EAR99	EAR99	EAR99
access mode	FAST PAGE	FAST PAGE	FAST PAGE	FAST PAGE
Maximum access time	60 ns	50 ns	50 ns	60 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O type	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-XSMA-N72	R-XSMA-N72	R-XSMA-N72	R-XSMA-N72
memory density	301989888 bit	301989888 bit	301989888 bit	301989888 bi
Memory IC Type	FAST PAGE DRAM MODULE	FAST PAGE DRAM MODULE	FAST PAGE DRAM MODULE	FAST PAGE DRAM MODULE
memory width	36	36	36	36
Number of functions	1	1	1	1
Number of ports	1	1	1	1
Number of terminals	72	72	72	72
word count	8388608 words	8388608 words	8388608 words	8388608 words
character code	8000000	8000000	8000000	8000000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
organize	8MX36	8MX36	8MX36	8MX36
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	SIMM	SIMM	SIMM	SIMM
Encapsulate equivalent code	SSIM72	SSIM72	SSIM72	SSIM72
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
power supply	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	4096	4096	4096	4096
Maximum standby current	0.006 A	0.006 A	0.006 A	0.006 A
Maximum slew rate	0.306 mA	0.336 mA	0.336 mA	0.306 mA
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	SINGLE	SINGLE	SINGLE	SINGLE

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