November 2006
rev 1.5
Low Power EMI Reduction IC
Features
•
•
•
FCC approved method of EMI attenuation.
Provides up to 15dB EMI reduction.
Generates a 1X, 2X and 4X low EMI spread
spectrum clock of the input frequency.
•
1X: ASM3P2811A/B
•
2X: ASM3P2812A/B
•
4X: ASM3P2814A/B
•
•
•
•
•
•
•
•
•
•
Optimized for input frequency range from
10MHz to 40 MHz.
Internal loop filter minimizes external
components and board space.
Selectable spread options: Down Spread and
Center Spread.
8 spread frequency deviation selections:
•
±0.625% to –3.5%
Low inherent cycle-to-cycle jitter.
3.3V Operating Voltage.
CMOS/TTL compatible inputs and outputs.
Pin-out compatible with Cypress CY25811,
CY25812 and CY25814.
Products are available in Commercial and
Industrial temperature range.
Available in 8-pin SOIC and TSSOP Packages.
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
deviation range from ±0.625% to –3.50%.
The ASM3P28XX reduces electromagnetic interference
(EMI) at the clock source, allowing system wide reduction
of EMI of
down stream clock and data dependent
signals. The ASM3P28XX allows significant system cost
savings by reducing the number of circuit board layers,
ferrite beads, shielding, and other passive components
that are traditionally required to pass EMI regulations.
The ASM3P28XX modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
The ASM3P28XX uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all-digital method.
Applications
Product Description
The ASM3P28XX is targeted towards EMI management
The ASM3P28XX devices are versatile spread spectrum
frequency modulators designed specifically for a wide
range of input clock frequencies from 10MHz to 40MHz.
(Refer Input/Output Frequency Range Selection Table).
The ASM3P28XX can generate an EMI reduced clock
from
crystal, ceramic resonator, or system clock. The
of
spread
options
and
percentage
ASM3P28XX-A and the ASM3P28XX-B offer various
combinations
deviations (Refer
Output Frequency Deviation and
Spread Option Selection Table).
These combinations
include Down and Center Spread and percentage
for memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as PC
peripheral devices, consumer electronics, and embedded
controller systems.
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
•
Tel: 408-879-9077
•
Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
November 2006
rev 1.5
Block Diagram
D_C SRS FRS
VDD
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
Modulation
XIN
Crystal
Oscillator
XOUT
Frequency
Divider
Feedback
Divide
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
Pin Configuration
XIN
1
VSS
2
D_C
3
SRS
4
8
XOUT
VDD
FRS
ModOUT
P2811A/B
P2812A/B
P2814A/B
7
6
5
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN
VSS
D_C
SRS
ModOUT
FRS
VDD
XOUT
Type
I
P
I
I
O
I
P
O
Description
Crystal connection or external frequency input. This pin has dual functions. It can
be connected to either an external crystal or an external reference clock.
Ground to entire chip.
Digital logic input used to select Down (LOW) or Center (HIGH) spread options.
(Refer
Output Frequency Deviation and Spread Option Selection Table).
This pin has an internal pull-up resistor.
Spread range select. Digital logic input used to select frequency deviation
(Refer
Output Frequency Deviation and Spread Option Selection Table).
This pin has an internal pull-up resistor.
Spread spectrum clock output
Frequency range select. Digital logic input used to select Input frequency range
(Refer
Input/Output Frequency Range Selection Table).
This pin has an internal pull-up resistor.
Power supply for the entire chip.
Crystal connection. Output connection for an external crystal. If using an external
reference, this pin must be left unconnected.
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 11
November 2006
rev 1.5
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
CC
I
DD
VDD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
(Inputs D_C, SRS and FRS are pulled high internally)
Input high current
XOUT Output low current
(V
XOL
@ 0.4V, V
DD
= 3.3V)
XOUT Output high current
(V
XOH
@ 2.5V, V
DD
= 3.3V)
Output low voltage (V
DD
= 3.3V, I
OL
= 20mA)
Output high voltage (V
DD
= 3.3V, I
OH
= 20mA)
Dynamic supply current
Normal mode (3.3V and 25pF loading)
Static supply current
Standby mode
Operating voltage
Power up time (first locked clock cycle after power up)
Clock out impedance
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
Parameter
Min
VSS – 0.3
-
-60.00
-
-
-
-
2.5
7.1 @ f
IN - min
-
3.0
-
-
Typ
-
-
-
-
-
-
-
-
-
4.5
3.3
-
50
Max
0.8
V
DD
+ 0.3
-20.00
1.00
12.00
12.00
0.4
-
13.9 @ f
IN - max
-
3.6
500
-
Unit
V
V
µA
µA
mA
mA
V
V
mA
mA
V
µS
Ω
AC Electrical Characteristics
Symbol
f
IN
Parameter
Input frequency for ASM3P2811/12/13/14 A/B
Output frequency for ASM3P2811A/B
Min
10
10
20
40
0.5
0.78
-200
45
Typ
-
-
-
-
-
-
-
50
Max
40
40
80
160
0.96
1.7
200
55
Unit
MHz
MHz
MHz
MHz
nS
nS
pS
%
f
OUT
Output frequency for AS3P2812A/B
Output frequency for AS3P2814A/B
t
LH
*
t
HL
*
t
JC
T
D
Output rise time (measured at 0.8V to 2.0V)
Output fall time (measured at 2.0V to 0.8V)
Jitter (Cycle to cycle)
Output duty cycle
* t
LH
and t
HL
are measured into a capacitive load of 15pF
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
4 of 11
PCB Design
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