October 2003
rev 1.0
ASM3P5821A
Features
FCC approved method of EMI attenuation.
Generates a 1X low EMI spread spectrum clock of
the input frequency.
Input frequency range: 20MHz –34MHz.
Internal loop filter minimizes external components
and board space.
Frequency deviation: -1.5%
Low inherent cycle-to-cycle jitter.
3.3V operating voltage.
TTL or CMOS compatible inputs and outputs.
Ultra-low power CMOS design.
o
o
Pinout
range.
Available in 8-pin SOIC and TSSOP.
TBD mA @ 3.3V, 25MHz
TBD mA @ 3.3V, 31MHz
compatible
with
Cypress
CY25811.
The ASM3P5821A reduces electromagnetic interference
(EMI) at the clock source, allowing system wide reduction
of EMI of
down stream clock and data dependent
signals. The ASM3P5821A allows significant system cost
savings by reducing the number of circuit board layers
ferrite beads, shielding and other passive components
that are traditionally required to pass EMI regulations.
The ASM3P5821A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The ASM3P5821A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Products are available for industrial temperature
Product Description
The ASM3P5821A is a versatile spread spectrum
frequency modulator designed specifically for input clock
frequencies in the range of 20MHz – 34MHz. The
ASM3P5821A can generate an EMI reduced clock from
crystal,
ceramic
resonator,
or
system
clock.
The
ASM3P5821A offers a percentage deviation of –1.5%.
Applications
The ASM3P5821A is targeted towards EMI management
for high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
Block Diagram
VDD
Modulation
XIN
Crystal
Oscillator
XOUT
Feedback
Divider
Frequency
Divider
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
MODOUT
VSS
Alliance Semiconductor
2575, Augustine Drive
•
Santa Clara, CA
•
Tel: 408.855.4900
•
Fax: 408.855.4999
•
www.alsc.com
Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
Pin Configuration
XIN
VSS
NC
1
8
ASM3P5821A
XOUT
VDD
NC
ModOUT
2
7
ASM3P5821A
3
6
NC
4
5
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN
VSS
NC
NC
MODOUT
NC
VDD
XOUT
P
O
O
Type
I
P
Description
Crystal connection or external reference frequency input. This pin has dual
functions. It can be connected to either an external crystal or an external
reference clock.
Ground to entire chip.
No Connect.
No Connect.
Spread spectrum low EMI output.
No Connect.
Power supply for the entire chip (3.3V).
Crystal connection. If using an external reference clock, this pin must be left
unconnected.
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 7
October 2003
rev 1.0
Absolute Maximum Ratings
Symbol
VDD, V
IN
T
STG
T
A
Parameter
Voltage on any pin with respect to GND
Storage temperature
Operating temperature
Rating
-0.5 to + 7.0
-65 to +125
0 to 70
ASM3P5821A
Unit
V
°C
°C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
CC
I
DD
V
DD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
Input high current
XOUT output low current (@0.4V, V
DD
=3.3V)
XOUT output high current (@ 2.5V, V
DD
=3.3V)
Output low voltage (V
DD
= 3.3V, I
OL
= 4mA)
Output high voltage (V
DD
= 3.3V, I
OH
= 4mA)
Dynamic supply current normal mode (3.3V and 10pF
loading)
Static supply current standby mode
Operating voltage
Power up time (first locked clock cycle after power up)
Clock out impedance
TBD
-
-
3.3
TBD
TBD
TBD
-
-
Parameter
Min
GND – 0.3
TBD
Typ
-
-
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
TBD
V
DD
+ 0.3
Unit
V
V
µA
µA
mA
mA
V
V
mA
µA
V
mS
Ω
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
3 of 7
DIY/Open Source Hardware
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