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LTC2209CUP-TR

Description
16-Bit, 160Msps ADC
File Size1MB,32 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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LTC2209CUP-TR Overview

16-Bit, 160Msps ADC

LTC2209
16-Bit, 160Msps ADC
FEATURES
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DESCRIPTION
The LTC
®
2209 is a 160Msps 16-bit A/D converter designed
for digitizing high frequency, wide dynamic range signals
with input frequencies up to 700MHz. The input range of
the ADC can be optimized with the PGA front end.
The LTC2209 is perfect for demanding communications
applications, with AC performance that includes 77.3dBFS
Noise Floor and 100dB spurious free dynamic range
(SFDR). Ultra low jitter of 70fs
RMS
allows undersampling
of high input frequencies with excellent noise performance.
Maximum DC specs include ±5LSB INL, ±1LSB DNL (no
missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for
the CMOS outputs: a single bus running at the full data
rate or demultiplexed busses running at half data rate. A
separate output power supply allows the CMOS output
swing to range from 0.5V to 3.6V.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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Sample Rate: 160Msps
77.3dBFS Noise Floor
100dB SFDR
SFDR >84dB at 250MHz (1.5V
P-P
Input Range)
PGA Front End (2.25V
P-P
or 1.5V
P-P
Input Range)
700MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
LVDS or CMOS Outputs
Single 3.3V Supply
Power Dissipation: 1.45W
Clock Duty Cycle Stabilizer
Pin-Compatible Family:
130Msps: LTC2208 (16-Bit), LTC2208-14 (14-Bit)
105Msps: LTC2217 (16-Bit)
64-Pin (9mm
×
9mm) QFN Package
APPLICATIONS
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Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
TYPICAL APPLICATION
3.3V
SENSE
V
CM
2.2μF
1.25V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV
DD
0.5V TO 3.6V
1μF
OF
CLKOUT
D15
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
V
DD
GND
ENC
+
ENC
PGA
SHDN
DITH
MODE
LVDS
RAND
1μF
1μF
3.3V
1μF
2209 TA01
64k Point FFT, f
IN
= 15.1MHz,
–1dBFS, PGA = 0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10
20
30 40 50 60
FREQUENCY (MHz)
70
80
2209 TA01b
ANALOG
INPUT
AIN
S/H
AMP
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CMOS
OR
LVDS
ADC CONTROL INPUTS
2209fa
AMPLITUDE (dBFS)
AIN
+
+
1

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Description 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC 16-Bit, 160Msps ADC
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