Rev 0; 3/08
Secure Microprocessor Chip
General Description
The DS5003 secure microprocessor incorporates
sophisticated security features including an array of
mechanisms that are designed to resist all levels of
threat, including observation, analysis, and physical
attack. As a result, a massive effort is required to obtain
any information about its memory contents.
Furthermore, the “soft” nature of the DS5003 allows fre-
quent modification of the secure information, thereby
minimizing the value of any secure information obtained
by such a massive effort. The device is an enhanced
version of the DS5002FP secure microprocessor chip
with additional scratchpad RAM.
Features
♦
8051-Compatible Microprocessor for
Secure/Sensitive Applications
Access 32kB, 64kB, or 128kB of Nonvolatile
SRAM for Program and/or Data Storage
128 Bytes of RAM
128 Bytes of Indirect Scratchpad RAM
In-System Programming Through On-Chip
Serial Port
Can Modify Its Own Program or Data Memory in
the End System
♦
Firmware Security Features
Memory Stored in Encrypted Form
Encryption Using On-Chip 64-Bit Key
Automatic True Random-Key Generator
Self-Destruct Input (SDI)
Top Coating Prevents Microprobing
Protects Memory Contents from Piracy
♦
Crash-Proof Operation
Maintains All Nonvolatile Resources for Over
10 Years (at Room Temperature) in the
Absence of Power
Power-Fail Reset
Early Warning Power-Fail Interrupt
Watchdog Timer
DS5003
Differences from the DS5002FP
The DS5003 implements only one additional feature
from the DS5002FP: it adds 128 bytes of internal
scratchpad memory (for a total of 256 bytes) similar to
that used in 8032/8052 architectures. This additional
memory is accessible through indirect addressing 8051
instructions such as “mov a, @r1,” where r1 now can
have a value between 0 and 255. It is also usable as
stack space for pushes, pops, calls, and returns.
Register indirect addressing is used to access the
scratchpad RAM locations above 7Fh. It can also be
used to reach the lower RAM (0h–7Fh) if needed. The
address is supplied by the contents of the working reg-
ister specified in the instruction. Thus, one instruction
can be used to reach many values by altering the con-
tents of the designated working register. Note that only
R0 and R1 can be used as pointers. An example of reg-
ister indirect addressing is as follows:
ANL A, @R0 ;Logical AND the Accumulator with
the contents of
;the register pointed to by the
value stored in R0
Ordering Information
PART
TEMP
RANGE
0°C to +70°C
INTERNAL
MICRO
PROBE
SHIELD
Yes
PIN-
PACKAGE
80 MQFP
DS5003FPM-16+
Applications
PIN Pads
Gaming Machines
Any Application Requiring Software Protection
+Denotes
a lead-free/RoHS-compliant package.
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Secure Microprocessor Chip
DS5003
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin
Relative to Ground..................................-0.3V to (V
CC
+ 0.5V)
Voltage Range on V
CC
Relative
to Ground ..........................................................-0.3V to +6.0V
Operating Temperature Range.............................40°C to +85°C
Storage Temperature* .......................................-55°C to +125°C
Soldering Temperature...........................Refer to the IPC/JEDEC
J-STD-020 Specification.
*Storage temperature is defined as the temperature of the device when V
CC
= 0V and V
LI
= 0V. In this state, the contents of SRAM
are not battery backed and are undefined.
Note:
The DS5003 adheres to all AC and DC electrical specifications published for the DS5002FP.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC CHARACTERISTICS
(V
CC
= 5V ±10%, T
A
= 0°C to +70°C.)
PARAMETER
Operating Voltage
Minimum Operating Voltage
Power-Fail Warning Voltage
Lithium Supply Voltage
Operating Current at 16MHz
Idle-Mode Current at 12MHz
Stop-Mode Current
Pin Capacitance
Output Supply Voltage (V
CCO
)
Output Supply Battery-Backed
Mode (V
CCO
,
CE1–CE4, PE1,
PE2)
Output Supply Current (Note 7)
Lithium-Backed Quiescent
Current (Note 8)
Reset Trip Point in Stop Mode
Input Low Voltage
Input High Voltage
Input High Voltage
(RST, XTAL1,
PROG)
Output Low Voltage at
I
OL
= 1.6mA (Ports 1, 2, 3,
PF)
V
IL
V
IH1
V
IH2
V
OL1
SYMBOL
V
CC
V
CCMIN
V
PFW
V
LI
I
CC
I
IDLE
I
STOP
C
IN
V
CCO1
(Note 1)
0°C to +70°C (Note 1)
0°C to +70°C (Note 1)
(Note 1)
(Note 2)
0°C to +70°C (Note 3)
(Note 4)
(Note 5)
(Notes 1, 2)
V
CC
-
0.45
V
LI
-
0.65
75
5
4.00
4.40
-0.3
2.0
3.5
0.15
75
4.25
4.65
+0.8
V
CC
+
0.3
V
CC
+
0.3
0.45
CONDITIONS
MIN
V
CCMIN
4.00
4.25
2.5
4.12
4.37
TYP
MAX
5.5
4.25
4.50
4.0
36
7.0
80
10
UNITS
V
V
V
V
mA
mA
μA
pF
V
V
CCO2
I
CCO1
I
LI
0°C to +70°C (Notes 1, 6)
V
CCO
= V
CC
- 0.45V
0°C to +70°C
BAT = 3.0V (0°C to +70°C) (Note 1)
BAT = 3.3V (0°C to +70°C) (Note 1)
(Note 1)
(Note 1)
(Note 1)
(Notes 1, 9)
V
mA
nA
V
V
V
V
V
2
_______________________________________________________________________________________
Secure Microprocessor Chip
AC CHARACTERISTICS—POWER-CYCLE TIME
(V
CC
= 5V ±10%, T
A
= 0°C to +70°C.) (Figure 4)
PARAMETER
Slew Rate from V
CCMIN
to V
LI
Crystal Startup Time
Power-On Reset Delay
SYMBOL
t
F
t
CSU
t
POR
MIN
130
(Note 12)
21,504
t
CLK
MAX
UNITS
μs
DS5003
AC CHARACTERISTICS—SERIAL PORT TIMING (MODE 0)
(V
CC
= 5V ±10%, T
A
= 0°C to +70°C.) (Figure 5)
PARAMETER
Serial Port Clock Cycle Time
Output Data Setup to Rising Clock Edge
Output Data Hold After Rising Clock Edge
Clock Rising Edge to Input Data Valid
Input Data Hold After Rising Clock Edge
SYMBOL
t
SPCLK
t
DOCH
t
CHDO
t
CHDV
t
CHDIV
0
MIN
12t
CLK
10t
CLK
- 133
2t
CLK
- 117
10t
CLK
- 133
MAX
UNITS
μs
ns
ns
ns
ns
AC CHARACTERISTICS—BYTE-WIDE ADDRESS/DATA BUS TIMING
(V
CC
= 5V ±10%, T
A
= 0°C to +70°C.) (Figure 6)
PARAMETER
Delay to Byte-Wide Address Valid from
CE1, CE2,
or
CE1N
Low During Op Code Fetch
Pulse Width of
CE1–CE4, PE1–PE4,
or
CE1N
Byte-Wide Address Hold After
CE1, CE2,
or
CE1N
High During Op Code Fetch
Byte-Wide Data Setup to
CE1, CE2,
or
CE1N
High
During Op Code Fetch
Byte-Wide Data Hold After
CE1, CE2,
or
CE1N
High
During Op Code Fetch
Byte-Wide Address Hold After
CE1–CE4, PE1–PE4,
or
CE1N
High During MOVX
Delay from Byte-Wide Address Valid
CE1–CE4,
PE1–PE4,
or
CE1N
Low During MOVX
Byte-Wide Data Setup to
CE1–CE4, PE1–PE4,
or
CE1N
High During MOVX (Read)
Byte-Wide Data Hold After
CE1–CE4, PE1–PE4,
or
CE1N
High During MOVX (Read)
Byte-Wide Address Valid to R/W Active During
MOVX (Write)
SYMBOL
t
CE1LPA
t
CEPW
t
CE1HPA
t
OVCE1H
t
CE1HOV
t
CEHDA
t
CELDA
t
DACEH
t
CEHDV
t
AVRWL
4t
CLK
- 35
2t
CLK
- 20
1t
CLK
+ 40
0
4t
CLK
- 30
4t
CLK
- 35
1t
CLK
+ 40
0
3t
CLK
- 35
MIN
MAX
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
_______________________________________________________________________________________
5
TI Technology Forum
京公网安备 11010802033920号
EEWORLD
