LD08JA180JAB9A datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> capacitor> LD08JA180JAB9A

LD08JA180JAB9A: DescriptionCeramic Capacitor, Multilayer, Ceramic, 4000V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.000018uF, Surface Mount, 1808, CHIP; CategoryPassive components capacitor; File Size56KB，2 Pages; ManufacturerAVX

Download Datasheet Parametric View All

LD08JA180JAB9A Overview

Ceramic Capacitor, Multilayer, Ceramic, 4000V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.000018uF, Surface Mount, 1808, CHIP

LD08JA180JAB9A Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	AVX
package instruction	, 1808
Reach Compliance Code	_compli
ECCN code	EAR99
capacitance	0.000018 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	2.03 mm
JESD-609 code	e0
length	4.57 mm
Manufacturer's serial number	LD08
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	BULK
positive tolerance	5%
Rated (DC) voltage (URdc)	4000 V
series	LD08(4KV,C0G)HV
size code	1808
surface mount	YES
Temperature characteristic code	C0G
Temperature Coefficient	-/+30ppm/Cel ppm/°C
Terminal surface	Tin/Lead (Sn/Pb) - with Nickel (Ni) barrie
Terminal shape	WRAPAROUND
width	2.03 mm

Preview

Download Datasheet

View All

High Voltage MLC Chips

Tin/Lead Termination “B”

For 600V to 5000V Application

AVX Corporation will support those customers for commercial and

military Multilayer Ceramic Capacitors with a termination consisting of

5% minimum lead. This termination is indicated by the use of a “B” in

the 12th position of the AVX Catalog Part Number. This fulfills AVX’s

commitment to providing a full range of products to our customers. AVX

has provided in the following pages, a full range of values that we are

offering in this “B” termination.

Larger physical sizes than normally encountered chips are used to make

high voltage MLC chip product. Special precautions must be taken in

applying these chips in surface mount assemblies. The temperature

gradient during heating or cooling cycles should not exceed 4ºC per

second. The preheat temperature must be within 50ºC of the peak

temperature reached by the ceramic bodies through the soldering

process. Chip sizes 1210 and larger should be reflow soldered only.

Capacitors may require protective surface coating to prevent external

arcing.

NEW 630V RANGE

HOW TO ORDER

LD08

AVX

Style

LD05 - 0805

LD06 - 1206

LD10 - 1210

LD08 - 1808

LD12 - 1812

LD13 - 1825

LD20 - 2220

LD14 - 2225

LD40 - 3640

Voltage

600V/630V = C

1000V = A

1500V = S

2000V = G

2500V = W

3000V = H

4000V = J

5000V = K

Temperature

Coefficient

C0G = A

X7R = C

271

Capacitance Code

(2 significant digits

+ no. of zeros)

Examples:

10 pF = 100

100 pF = 101

1,000 pF = 102

22,000 pF = 223

220,000 pF = 224

1 µF = 105

Capacitance

Tolerance

C0G: J = ±5%

K = ±10%

M = ±20%

X7R: K = ±10%

M = ±20%

Z = +80%, -20%

Test

Level

A = Standard

Termination

B = 5% Min Pb

Packaging

1 = 7" Reel

3 = 13" Reel

9 = Bulk

Special Code

A = Standard

Notes: Capacitors with X7R dielectrics are not intended for applications across AC supply mains or AC line filtering with polarity reversal. Contact plant for recommendations.

Contact factory for availability of Termination and Tolerance options for Specific Part Numbers.

DIMENSIONS

SIZE

(L) Length

millimeters (inches)

LD05 (0805)

LD06 (1206)

LD10* (1210) LD08* (1808) LD12* (1812) LD13* (1825) LD20* (2220) LD25* (2225) LD40* (3640)

2.01 ± 0.20

3.20 ± 0.20

4.57 ± 0.25

4.50 ± 0.30

5.70 ± 0.40

5.72 ± 0.25

9.14 ± 0.25

(0.079 ± 0.008) (0.126 ± 0.008) (0.126 ± 0.008) (0.180 ± 0.010) (0.177 ± 0.012) (0.177 ± 0.012) (0.224 ± 0.016) (0.225 ± 0.010) (0.360 ± 0.010)

(W) Width

1.25 ± 0.20

1.60 ± 0.20

2.50 ± 0.20

2.03 ± 0.25

3.20 ± 0.20

6.40 ± 0.30

5.00 ± 0.40

6.35 ± 0.25

10.2 ± 0.25

(0.049 ±0.008) (0.063 ± 0.008) (0.098 ± 0.008) (0.080 ± 0.010) (0.126 ± 0.008) (0.252 ± 0.012) (0.197 ± 0.016) (0.250 ± 0.010) (0.400 ± 0.010)

(T) Thickness

1.30

1.52

1.70

2.03

2.54

3.30

2.54

Max.

(0.051)

(0.060)

(0.067)

(0.080)

(0.100)

(0.130)

(0.100)

(t) terminal min. 0.50 ± 0.25

0.25 (0.010)

0.76 (0.030)

max. (0.020 ± 0.010) 0.75 (0.030)

0.75 (0.030)

1.02 (0.040)

1.52 (0.060)

* Reflow soldering only.

Recommended Resources

Ten circuit designs for precision full-wave rectification

Narrow pulse forming circuit

MAX230 multi-channel data interface circuit

Three electric motors have control circuits required for starting and stopping sequences

Homemade high-quality integrated amplifier 01

STK4131 II power amplifier circuit diagram

Amateur testing and adjustment of induction cooker output power: [i=s]This post was last edited by jameswangsynnex on 2015-3-3 20:00[/i]There are multiple heating temperature selection buttons on the operation panel of the induction cooker, and there is also an out...; lorant Mobile and portable

Is the 2K RAM of the MSP430F149 enough?: In order to maintain the stable operation of the system, how many bytes should I not exceed when setting global variables?If the RAM is insufficient, how does the 430 handle it? Will the system automa...; zeno83121 Microcontroller MCU

"Thank you TI" + Leader in the long-distance race: Leader in the long run Among many IT companies, TI is a leader in the long run, constantly innovating and giving people surprises. From the first lauchPad, I really came into contact with TI, from MSP...; fyaocn Microcontroller MCU

How to learn FPGA well: I feel the need to learn something more practical recently. I browsed the forum and found that I am interested in FPGA. I have studied digital logic and VHDL in college, but I have never learned Veril...; 奔跑的蜗牛 PCB Design

NI_Circuit_Design_Suite_13_0 is here, with harmony!: Download link: http://download.ni.com/evaluation/labview/ekit/other/downloader/NI_Circuit_Design_Suite_13_0.exe...; qinkaiabc Integrated technical exchanges

PCB newbies, please take a look --- POWER PCB inner layer attribute setting and inner electrical layer segmentation and copper plating: I have seen many netizens raise questions about the setting of positive and negative films on the inner layer of POWER PCB, the division of the inner electrical layer, and the copper plating. There ar...; yfee FPGA/CPLD

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components