PDTB1xxxT series
500 mA, 50 V PNP resistor-equipped transistors
Rev. 1 — 13 May 2014
Product data sheet
1. Product profile
1.1 General description
PNP Resistor-Equipped Transistor (RET) family in a small SOT23 (TO-236AB)
Surface-Mounted Device (SMD) plastic package.
Table 1.
Product overview
Package
Nexperia
PDTB143ET
PDTB143XT
PDTB114ET
SOT23
JEITA
TO-236AB
JEDEC
-
NPN
complement
PDTD143ET
PDTD143XT
PDTD114ET
Package
configuration
small
Type number
1.2 Features
500 mA output current capability
Built-in bias resistors
Simplifies circuit design
Reduces component count
10 % resistor ratio tolerance
AEC-Q101 qualified
High temperature applications
up to 175 °C
1.3 Applications
IC inputs control
Cost-saving alternative to BC807 or
BC817 series transistors in digital
applications
Switching loads
Nexperia
PDTB1xxxT series
500 mA, 50 V PNP resistor-equipped transistors
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
R1
Quick reference data
Parameter
collector-emitter voltage
output current
bias resistor 1 (input)
PDTB143ET
PDTB143XT
PDTB114ET
R2
bias resistor 2 (base-emitter)
PDTB143ET
PDTB143XT
PDTB114ET
4.7
10
10
k
k
k
4.7
4.7
10
k
k
k
Conditions
open base
Min
-
-
Typ
-
-
Max
50
500
Unit
V
mA
2. Pinning information
Table 3.
Pin
1
2
3
Pinning
Description
input (base)
GND (emitter)
output (collector)
1
2
3
R1
Simplified outline
Graphic symbol
3
1
R2
2
sym003
3. Ordering information
Table 4.
Ordering information
Package
Name
PDTB1xxxT series
TO-236AB
Description
plastic surface-mounted package; 3 leads
Version
SOT23
Type number
PDTB1XXXT_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 13 May 2014
2 of 18
Nexperia
PDTB1xxxT series
500 mA, 50 V PNP resistor-equipped transistors
4. Marking
Table 5.
Marking codes
Marking code
[1]
*4X
*4Y
*09
Type number
PDTB143ET
PDTB143XT
PDTB114ET
[1]
* = placeholder for manufacturing site code
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
PDTB143ET
PDTB143XT
PDTB114ET
V
I
input voltage
PDTB143ET
PDTB143XT
PDTB114ET
I
O
P
tot
T
j
T
amb
T
stg
[1]
[2]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
30
30
50
-
Max
50
50
10
7
10
+10
+7
+10
500
320
460
175
+175
+175
Unit
V
V
V
V
V
V
V
V
mA
mW
mW
C
C
C
output current
total power dissipation
junction temperature
ambient temperature
storage temperature
T
amb
25
C
[1]
[2]
-
-
-
55
55
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
PDTB1XXXT_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 13 May 2014
3 of 18
Nexperia
PDTB1xxxT series
500 mA, 50 V PNP resistor-equipped transistors
500
P
tot
(mW)
400
(1)
aaa-012834
300
(2)
200
100
0
-75
25
125
T
amb
(°C)
225
(1) FR4 PCB, 4-layer copper, standard footprint
(2) FR4 PCB, single-sided copper, standard footprint.
Fig 1.
Power derating curves
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction
to ambient
Conditions
in free air
[1]
[2]
Min
-
-
Typ
-
-
Max
470
327
Unit
K/W
K/W
[1]
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
PDTB1XXXT_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 13 May 2014
4 of 18
Nexperia
PDTB1xxxT series
500 mA, 50 V PNP resistor-equipped transistors
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.2
0.1
0.05
10
0.02
0.01
0.5
aaa-012060
1
0
10
-1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, single-sided copper, tin-plated and standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23/TO-236AB; typical values
aaa-012061
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, 4-layer copper, tin-plated and standard footprint.
Fig 3.
Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23/TO-236AB; typical values
PDTB1XXXT_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 13 May 2014
5 of 18
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