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5962F9215603Q9X

Description
Field Programmable Gate Array, 8000 Gates, CMOS, DIE
CategoryProgrammable logic devices    Programmable logic   
File Size585KB,36 Pages
ManufacturerActel
Websitehttp://www.actel.com/
Download Datasheet Parametric View All

5962F9215603Q9X Overview

Field Programmable Gate Array, 8000 Gates, CMOS, DIE

5962F9215603Q9X Parametric

Parameter NameAttribute value
MakerActel
package instructionDIE,
Reach Compliance Codeunknow
JESD-30 codeR-XUUC-N176
Equivalent number of gates8000
Number of terminals176
organize8000 GATES
Package body materialUNSPECIFIED
encapsulated codeDIE
Package shapeRECTANGULAR
Package formUNCASED CHIP
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Terminal formNO LEAD
Terminal locationUPPER
total dose300k Rad(Si) V
REVISIONS
LTR
A
B
C
D
E
F
DESCRIPTION
Added changes in accordance with NOR 5962-R116-94.
Added 03 device, removed CAGE number 01295, and made editorial
changes throughout.
Added changes in accordance with NOR 5962-R059-97.
Added changes in accordance with NOR 5962-R193-97.
Corrected radiation circuit. Updated boilerplate. ksr
Add 04 and 05 devices, change case outlines from CQCC2-F172 to
figure 4. Page 3, section 1.3 changed T
J
from 175°C to 150°C.
Added appendix A for die. Added CQFP package option case U, and
binning circuitry delay for 04 and 05 in Table IA. ksr
Change the generic number for the 01 and 02 devices as well as the
bin speed. Update the binning circuit delay on table IA. Update the
bin speed for the 01 device in section 10.2.2. ksr
Replaced figure 1, case outline Y with new graphic art work. ksr
DATE
(YR-MO-DA)
94-03-03
96-07-09
96-11-12
97-03-03
98-03-31
APPROVED
M. A. Frye
M. A. Frye
Raymond Monnin
Raymond Monnin
Raymond Monnin
98-09-18
Raymond Monnin
G
98-11-15
Raymond Monnin
H
00-04-28
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
H
15
H
16
H
17
H
18
REV
SHEET
PMIC N/A
PREPARED BY
Rajesh Pithadia
CHECKED BY
Jeff Bowling
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD
PROGRAMMABLE GATE ARRAY, 8000 GATES, MONOLITHIC
SILICON
H
19
H
20
H
21
H
1
H
22
H
2
H
23
H
3
H
24
H
4
H
25
H
5
H
26
H
6
H
27
H
7
H
28
H
8
H
29
H
9
H
30
H
10
H
31
H
11
H
32
H
12
H
33
H
13
H
34
H
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 42316
http://www.dscc.dla.mil
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
93-04-07
SIZE
REVISION LEVEL
H
SHEET
1
OF
33
CAGE CODE
A
67268
5962-92156
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E231-00

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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