ZL40226LDG1 datasheet, PDF - EEWORLD Datasheet

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ZL40226LDG1: DescriptionLow Skew Clock Driver, 4000/14000/40000 Series, 16 True Output(s), 0 Inverted Output(s), CMOS; Categorylogic logic; File Size488KB，23 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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ZL40226LDG1 Overview

Low Skew Clock Driver, 4000/14000/40000 Series, 16 True Output(s), 0 Inverted Output(s), CMOS

ZL40226LDG1 Parametric

Parameter Name	Attribute value
Maker	Microchip
package instruction	QFN-32
Reach Compliance Code	compli
Factory Lead Time	6 weeks
Other features	ALSO OPERATES AT 3.3 V SUPPLY
series	4000/14000/40000
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-XQCC-N32
length	5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	32
Actual output times	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
propagation delay (tpd)	2 ns
Same Edge Skew-Max（tskwd）	0.15 ns
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	2.625 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	5 mm

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ZL40226

Precision 2:8 LVDS Fanout Buffer with

Simple Input Reference Switching

Data Sheet

Features

Inputs/Outputs

•

Accepts two differential or single-ended inputs

• LVPECL, LVDS, CML, HCSL, LVCMOS

Eight precision LVDS outputs

Operating frequency up to 750 MHz

April 2014

Ordering Information

ZL40226LDG1

ZL40226LDF1

32 Pin QFN

Trays

32 Pin QFN

Tape and Reel

Matte Tin

Package size: 5 x 5 mm

-40

C to +85

Applications

•

General purpose clock distribution

Low jitter clock trees

Logic translation

Clock and data signal restoration

Redundant clock distribution

Wired communications: OTN, SONET/SDH, GE,

10 GE, FC and 10G FC

PCI Express generation 1/2/3 clock distribution

Wireless communications

High performance microprocessor clock

distribution

Power

•

Option for 2.5 V or 3.3 V power supply

Current consumption of 113 mA

On-chip Low Drop Out (LDO) Regulator for superior

power supply rejection

Performance

•

Ultra low additive jitter of 104 fs RMS

out0_p

out0_n

out1_p

out1_n

out2_p

out2_n

clk0_p

clk0_n

Control

clk1_p

clk1_n

Buffer

out3_p

out3_n

out4_p

out4_n

out5_p

out5_n

sel

out6_p

out6_n

out7_p

out7_n

Figure 1 - Functional Block Diagram

Microsemi Corporation

ZL40226

Data Sheet

Table of Contents

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Inputs/Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Change Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.0 Package Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.0 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.0 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Clock Input Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Clock Input Termination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.3 Clock Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 Device Additive Jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.5 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.5.1 Sensitivity to power supply noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.5.2 Power supply filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.5.3 PCB layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.0 AC and DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.0 Performance Characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.0 Typical Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

7.0 Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

8.0 Mechanical Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Microsemi Corporation

ZL40226

Data Sheet

List of Figures

Figure 1 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2 - Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3 - LVPECL Input DC Coupled Thevenin Equivalent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4 - LVPECL Input DC Coupled Parallel Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 5 - LVPECL Input AC Coupled Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 6 - LVDS Input DC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 7 - LVDS Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 8 - CML Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 9 - HCSL Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 10 - CMOS Input DC Coupled Referenced to VDD/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 11 - CMOS Input DC Coupled Referenced to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 12 - Simplified LVDS Output Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 13 - LVDS DC Coupled Termination (Internal Receiver Termination) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 14 - LVDS DC Coupled Termination (External Receiver Termination) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 15 - LVDS AC Coupled Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 16 - LVDS AC Output Termination for CML Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 17 - Additive Jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 18 - Decoupling Connections for Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 19 - Differential Voltage Parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 20 - Input To Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Microsemi Corporation

ZL40226LDG1 Related Products

	ZL40226LDG1	ZL40226LDF1
Description	Low Skew Clock Driver, 4000/14000/40000 Series, 16 True Output(s), 0 Inverted Output(s), CMOS	Low Skew Clock Driver, 4000/14000/40000 Series, 16 True Output(s), 0 Inverted Output(s), CMOS
Maker	Microchip	Microchip
package instruction	QFN-32	QFN-32
Reach Compliance Code	compli	compli
Factory Lead Time	6 weeks	6 weeks
Other features	ALSO OPERATES AT 3.3 V SUPPLY	ALSO OPERATES AT 3.3 V SUPPLY
series	4000/14000/40000	4000/14000/40000
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-XQCC-N32	S-XQCC-N32
length	5 mm	5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Number of functions	1	1
Number of terminals	32	32
Actual output times	16	16
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
propagation delay (tpd)	2 ns	2 ns
Same Edge Skew-Max（tskwd）	0.15 ns	0.15 ns
Maximum seat height	1 mm	1 mm
Maximum supply voltage (Vsup)	2.625 V	2.625 V
Minimum supply voltage (Vsup)	2.375 V	2.375 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
width	5 mm	5 mm

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