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74AUP1G09GX

Description
AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5, 0.80 X 0.80 MM, 0.35 MM HEIGHT, PLASTIC, SOT-1226, X2SON-5
Categorylogic    logic   
File Size335KB,19 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74AUP1G09GX Overview

AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5, 0.80 X 0.80 MM, 0.35 MM HEIGHT, PLASTIC, SOT-1226, X2SON-5

74AUP1G09GX Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSON
package instructionHVSON,
Contacts5
Reach Compliance Codeunknow
seriesAUP/ULP/V
JESD-30 codeS-PDSO-N5
JESD-609 codee3
length0.8 mm
Logic integrated circuit typeAND GATE
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeHVSON
Package shapeSQUARE
Package formSMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)24 ns
Maximum seat height0.35 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTIN
Terminal formNO LEAD
Terminal pitch0.48 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width0.8 mm
74AUP1G09
Low-power 2-input AND gate with open-drain
Rev. 4 — 28 June 2012
Product data sheet
1. General description
The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The
output of the device is an open-drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
μA
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C

74AUP1G09GX Related Products

74AUP1G09GX 74AUP1G09GS 74AUP1G09GN
Description AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5, 0.80 X 0.80 MM, 0.35 MM HEIGHT, PLASTIC, SOT-1226, X2SON-5 IC AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6, Gate IC AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6, Gate
Is it Rohs certified? conform to conform to conform to
Maker NXP NXP NXP
Parts packaging code SON SON SON
package instruction HVSON, VSON, SOLCC6,.04,14 SON, SOLCC6,.04,12
Contacts 5 6 6
Reach Compliance Code unknow compliant compliant
series AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 code S-PDSO-N5 S-PDSO-N6 R-PDSO-N6
JESD-609 code e3 e3 e3
length 0.8 mm 1 mm 1 mm
Logic integrated circuit type AND GATE AND GATE AND GATE
Humidity sensitivity level 1 1 1
Number of functions 1 1 1
Number of entries 2 2 2
Number of terminals 5 6 6
Maximum operating temperature 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Output characteristics OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVSON VSON SON
Package shape SQUARE SQUARE RECTANGULAR
Package form SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260 260
propagation delay (tpd) 24 ns 24 ns 24 ns
Maximum seat height 0.35 mm 0.35 mm 0.35 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V 1.1 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface TIN Tin (Sn) Tin (Sn)
Terminal form NO LEAD NO LEAD NO LEAD
Terminal pitch 0.48 mm 0.35 mm 0.3 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30
width 0.8 mm 1 mm 0.9 mm
Load capacitance (CL) - 30 pF 30 pF
MaximumI(ol) - 0.0017 A 0.0017 A
Encapsulate equivalent code - SOLCC6,.04,14 SOLCC6,.04,12
power supply - 1.2/3.3 V 1.2/3.3 V
Prop。Delay @ Nom-Sup - 24 ns 24 ns
Certification status - Not Qualified Not Qualified
Schmitt trigger - YES YES
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