BUK754R7-60E
11 September 2012
N-channel TrenchMOS standard level FET
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in a SOT78 package using TrenchMOS technology.
This product has been designed and qualified to AEC Q101 standard for use in high
performance automotive applications.
1.2 Features and benefits
•
AEC Q101 compliant
•
Repetitive avalanche rated
•
Suitable for thermally demanding environments due to 175 °C rating
•
True standard level gate with VGS(th) rating of greater than 1V at 175 °C
1.3 Applications
•
12 V Automotive systems
•
Motors, lamps and solenoid control
•
Start-Stop micro-hybrid applications
•
Transmission control
•
Ultra high performance power switching
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 10 V; T
mb
= 25 °C;
Fig. 1
T
mb
= 25 °C;
Fig. 2
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 11
I
D
= 25 A; V
DS
= 48 V; V
GS
= 10 V;
Fig. 13; Fig. 14
[1]
Continuous current is limited by package.
[1]
Min
-
-
-
Typ
-
-
-
Max
60
100
234
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
-
3.36
4.6
mΩ
Dynamic characteristics
Q
GD
gate-drain charge
-
26.1
-
nC
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NXP Semiconductors
BUK754R7-60E
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
G
mbb076
Simplified outline
mb
Graphic symbol
D
S
1 2 3
TO-220AB (SOT78A)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK754R7-60E
TO-220AB
Description
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
Version
SOT78A
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
V
GS
I
D
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
R
GS
= 20 kΩ
T
j
≤ 175 °C; DC
T
mb
= 25 °C; V
GS
= 10 V;
Fig. 1
T
mb
= 100 °C; V
GS
= 10 V;
Fig. 1
I
DM
P
tot
T
stg
T
j
I
S
I
SM
BUK754R7-60E
Min
-
-
-20
[1]
[1]
Max
60
60
20
100
100
613
234
175
175
Unit
V
V
V
A
A
A
W
°C
°C
-
-
-
-
-55
-55
peak drain current
total power dissipation
storage temperature
junction temperature
T
mb
= 25 °C; pulsed; t
p
≤ 10 µs;
Fig. 4
T
mb
= 25 °C;
Fig. 2
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
All information provided in this document is subject to legal disclaimers.
[1]
-
-
100
613
A
A
2 / 12
© NXP B.V. 2012. All rights reserved
Product data sheet
11 September 2012
NXP Semiconductors
BUK754R7-60E
N-channel TrenchMOS standard level FET
Symbol
E
DS(AL)S
Parameter
non-repetitive drain-source
avalanche energy
Conditions
I
D
= 100 A; V
sup
≤ 60 V; R
GS
= 50 Ω;
V
GS
= 60 V; T
j(init)
= 25 °C; unclamped;
Fig. 3
[2][3]
Min
-
Max
273
Unit
mJ
Avalanche ruggedness
[1]
[2]
[3]
200
I
D
(A)
150
Continuous current is limited by package.
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Refer to application note AN10273 for further information.
003aah495
120
P
der
(%)
80
03aa16
100
(1)
40
50
0
0
50
100
150 T
200
mb
(° C)
0
0
50
100
150
T
mb
(°C)
200
(1) Capped at 100A due to package
Fig. 1.
Continuous drain current as a function of
mounting base temperature
Fig. 2.
Normalized total power dissipation as a
function of mounting base temperature
10
3
I
AL
(A)
10
2
003aah496
(1)
10
(2)
1
(3)
10
-1
10
-3
10
-2
10
-1
1 t (ms) 10
AL
Fig. 3.
Single pulse avalanche rating; avalanche current as a function of avalanche time
BUK754R7-60E
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© NXP B.V. 2012. All rights reserved
Product data sheet
11 September 2012
3 / 12
NXP Semiconductors
BUK754R7-60E
N-channel TrenchMOS standard level FET
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/ I
D
003aah497
t
p
=10 µs
100 µ s
10
DC
1 ms
1
10 ms
100 ms
10
-1
10
-1
1
10
V
DS
(V)
10
2
Fig. 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
1
Z
th(j-mb)
δ = 0.5
(K/W)
0.2
10
-1
Conditions
Fig. 5
Min
-
Typ
-
Max
0.64
Unit
K/W
R
th(j-a)
vertical in still air
-
60
-
K/W
003aah483
0.1
0.05
0.02
10
-2
single shot
P
δ=
t
p
T
t
p
t
T
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
1
Fig. 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK754R7-60E
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© NXP B.V. 2012. All rights reserved
Product data sheet
11 September 2012
4 / 12
NXP Semiconductors
BUK754R7-60E
N-channel TrenchMOS standard level FET
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
Fig. 9; Fig. 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
Fig. 9
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
Fig. 9
I
DSS
drain leakage current
V
DS
= 60 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 60 V; V
GS
= 0 V; T
j
= 175 °C
I
GSS
gate leakage current
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 11
V
GS
= 10 V; I
D
= 25 A; T
j
= 175 °C;
Fig. 11; Fig. 12
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
L
D
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain
inductance
from upper edge of mounting base to
centre of die ; T
j
= 25 °C
T
j
= 25 °C; from drain lead 6mm from
package to centre of die
L
S
BUK754R7-60E
Min
60
54
2.4
1
-
-
-
-
-
-
-
Typ
-
-
3
-
-
0.08
-
2
2
3.36
-
Max
-
-
4
-
4.5
1
500
100
100
4.6
10
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
Static characteristics
V
GS(th)
I
D
= 25 A; V
DS
= 48 V; V
GS
= 10 V;
Fig. 13; Fig. 14
-
-
-
82
18.5
26.1
4670
637
377
23
39
50
40
2.5
4.5
7.5
-
-
-
6230
765
516
-
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
nH
nH
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
T
j
= 25 °C;
Fig. 15
-
-
-
V
DS
= 45 V; R
L
= 1.8 Ω; V
GS
= 10 V;
R
G(ext)
= 5 Ω
-
-
-
-
-
-
-
internal source
inductance
measured from source lead to source
bond pad ; T
j
= 25 °C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
11 September 2012
5 / 12
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