ESD7371,
SZESD7371 Series
ESD Protection Diode
Ultra−Low Capacitance
The ESD7371 Series is designed to protect voltage sensitive
components that require ultra−low capacitance from ESD and
transient voltage events. Excellent clamping capability, low
capacitance, high breakdown voltage, high linearity, low leakage, and
fast response time make these parts ideal for ESD protection on
designs where board space is at a premium. It has industry leading
capacitance linearity over voltage making it ideal for RF applications.
This capacitance linearity combined with the extremely small package
and low insertion loss makes this part well suited for use in antenna
line applications for wireless handsets and terminals.
Features
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MARKING
DIAGRAMS
2
1
SOD−323
CASE 477
AG
M
AG
1
•
•
•
•
•
•
•
•
M
2
2
1
Industry Leading Capacitance Linearity Over Voltage
Low Capacitance (0.7 pF Max, I/O to GND)
Stand−off Voltage: 5.3 V
Low Leakage: < 1 nA
Low Dynamic Resistance < 1
W
IEC61000−4−2 Level 4 ESD Protection
1000 ESD IEC61000−4−2 Strikes
±8
kV Contact / Air Discharged
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
SOD−523
CASE 502
SOD−923
CASE 514AB
X, XX
M
AE M
= Specific Device Code
= Date Code
PIN CONFIGURATION
AND SCHEMATIC
•
•
•
•
RF Signal ESD Protection
RF Switching, PA, and Antenna ESD Protection
Near Field Communications
USB 2.0, USB 3.0
Rating
Symbol
Value
20
3.0
°P
D
°
R
qJA
T
J
, T
stg
T
L
300
400
−55 to
+150
260
Unit
kV
A
mW
°C/W
°C
°C
1
Cathode
2
Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
IEC 61000−4−2 (ESD) (Note 1)
IEC 61000−4−5 (ESD) (Note 2)
Total Power Dissipation (Note 3) @ T
A
= 25°C
Thermal Resistance, Junction−to−Ambient
Junction and Storage Temperature Range
Lead Solder Temperature − Maximum
(10 Second Duration)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse at T
A
= 25°C, per IEC61000−4−2 waveform.
2. Non−repetitive current pulse at T
A
= 25°C, per IEC61000−4−5 waveform.
3. Mounted with recommended minimum pad size, DC board FR−4
©
Semiconductor Components Industries, LLC, 2014
1
August, 2018 − Rev. 3
Publication Order Number:
ESD7371/D
ESD7371, SZESD7371 Series
See Application Note AND8308/D for further description of survivability specs.
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
I
PP
V
C
V
RWM
I
R
V
BR
I
T
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
PP
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ V
RWM
Breakdown Voltage @ I
T
Test Current
I
PP
V
C
V
BR
V
RWM
I
R
V
F
I
T
V
I
F
I
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
Uni−Directional
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise specified)
Parameter
Reverse Working Voltage
Breakdown Voltage (Note 4)
Reverse Leakage Current
Clamping Voltage (Note 5)
Clamping Voltage (Note 5)
Junction Capacitance
Dynamic Resistance
Symbol
V
RWM
V
BR
I
R
V
C
V
C
C
J
R
DYN
I
T
= 1 mA
V
RWM
= 5.3 V
I
PP
= 1 A
I
PP
= 3 A
V
R
= 0 V, f = 1 MHz
V
R
= 0 V, f < 1 GHz
TLP Pulse
7.0
< 1.0
11
14
0.43
0.39
0.45
50
15
20
0.7
0.7
Conditions
Min
Typ
Max
5.3
Unit
V
V
nA
V
V
pF
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
5. Non−repetitive current pulse at T
A
= 25°C, per IEC61000−4−5 waveform.
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2
ESD7371, SZESD7371 Series
1.E−03
1.E−04
1.E−05
CAPACITANCE (pF)
1.E−06
I (A)
1.E−07
1.E−08
1.E−09
1.E−10
1.E−11
1.E−12
0
1
2
3
4
5
6
V (V)
7
8
9
10 11 12
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
1
2
3
V
bias
(V)
4
5
6
Figure 1. IV Characteristics
2
0
CAPACITANCE (pF)
−2
−4
dB
−6
−8
−10
−12
−14
1E8
1E9
FREQUENCY (Hz)
1E10
2E10
Figure 2. CV Characteristics
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
FREQUENCY
Figure 3. RF Insertion Loss
Figure 4. Capacitance over Frequency
16
14
8
−16
−14
EQUIVALENT V
IEC
(kV)
TLP CURRENT (A)
8
TLP CURRENT (A)
12
6
−12
−10
−8
−6
−4
−2
6
10
8
6
4
2
0
0
2
4
6
8
10 12
VOLTAGE (V)
14
16
18
0
20
2
4
4
2
0
0
2
4
6
8
10 12
VOLTAGE (V)
14
16
18
0
20
Figure 5. Positive TLP I−V Curve
Figure 6. Negative TLP I−V Curve
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3
EQUIVALENT V
IEC
(kV)
ESD7371, SZESD7371 Series
IEC 61000−4−2 Spec.
Test Volt-
age (kV)
2
4
6
8
First Peak
Current
(A)
7.5
15
22.5
30
Current at
30 ns (A)
4
8
12
16
Current at
60 ns (A)
2
4
6
8
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
I @ 30 ns
IEC61000−4−2 Waveform
I
peak
100%
90%
Level
1
2
3
4
Figure 7. IEC61000−4−2 Spec
Device
ESD Gun
Under
Test
Oscilloscope
50
W
Cable
50
W
Figure 8. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
Transmission Line Pulse (TLP) Measurement
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 9. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 10 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
L
50
W
Coax
Cable
S
Attenuator
÷
10 MW
I
M
50
W
Coax
Cable
V
M
V
C
Oscilloscope
DUT
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
Figure 9. Simplified Schematic of a Typical TLP
System
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4
ESD7371, SZESD7371 Series
Figure 10. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
ORDERING INFORMATION
Device
ESD7371HT1G,
SZESD7371HT1G*
ESD7371XV2T1G,
SZESD7371XV2T1G*
ESD7371XV2T5G,
SZESD7371XV2T5G*
ESD7371P2T5G,
SZESD7371P2T5G*
Package
SOD−323
(Pb−Free)
SOD−523
(Pb−Free)
SOD−523
(Pb−Free)
SOD−923
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
8000 / Tape & Reel
8000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
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5