8S89874BKILFT datasheet, PDF - EEWORLD Datasheet

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8S89874BKILFT: DescriptionLow Skew Clock Driver, 8S Series, 2 True Output(s), 0 Inverted Output(s); Categorylogic logic; File Size647KB，21 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/; Environmental Compliance

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8S89874BKILFT Overview

Low Skew Clock Driver, 8S Series, 2 True Output(s), 0 Inverted Output(s)

8S89874BKILFT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Renesas Electronics Corporation
package instruction	HVQCCN, LCC16,.12SQ,20
Reach Compliance Code	compli
Samacsys Descripti	Buffers & Line Drivers 1 2 LVPECP Buffer Divider 2GHz 15ps
series	8S
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-XQCC-N16
JESD-609 code	e3
length	3 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3
Number of functions	1
Number of inverted outputs
Number of terminals	16
Actual output times	2
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC16,.12SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	2.5/3.3 V
Prop。Delay @ Nom-Su	0.84 ns
propagation delay (tpd)	0.84 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.015 ns
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.63 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	3 mm
minfmax	2000 MHz

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1:2 Differential-to-LVPECL

Buffer/Divider

Data Sheet

8S89874

General Description

The 8S89874 is a high speed 1:2 Differential-to- LVPECL Buffer/

Divider. The 8S89874 has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output

divider, which allows the device to be used as either a 1:2 fanout

buffer or frequency divider. The clock input has internal termination

resistors, allowing it to interface with several differential signal types

while minimizing the number of required external components. The

device is packaged in a small, 3mm x 3mm VFQFN package, making

it ideal for use on space-constrained boards.

Features

•

Two LVPECL/ECL output pairs

Frequency divide select options: ÷1 (pass through), ÷2, ÷4, ÷8,

÷16

IN, nIN input can accept the following differential input levels:

LVPECL, LVDS, CML

Output frequency: 2GHz (maximum)

Output skew: 15ps (maximum)

Part-to-part skew: 250ps (maximum)

Additive phase jitter, RMS: 0.20ps (typical)

LVPECL supply voltage range: 2.375V to 3.63V

ECL supply voltage range: -3.63V to -2.375V

-40°C to 85°C ambient operating temperature

Available in lead-free (RoHS 6) package

Block Diagram

Pullup

Pin Assignment

nRESET

Pullup

Enable

MUX

nQ0

nQ1

REF_AC

nIN

8S89874

50Ω

8XXXXXX

nIN

50Ω

Pullup

REF_AC

Decoder

16-pin, 3mm x 3mm VFQFN Package

Revision B February 9, 2016

nRESET

÷2

÷4

÷8

÷16

nQ1

8S89874BKILFT Related Products

	8S89874BKILFT	8S89874BKILF
Description	Low Skew Clock Driver, 8S Series, 2 True Output(s), 0 Inverted Output(s)	Low Skew Clock Driver, 8S Series, 2 True Output(s), 0 Inverted Output(s)
Is it Rohs certified?	conform to	conform to
Maker	Renesas Electronics Corporation	Renesas Electronics Corporation
package instruction	HVQCCN, LCC16,.12SQ,20	HVQCCN, LCC16,.12SQ,20
Reach Compliance Code	compli	compliant
series	8S	8S
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-XQCC-N16	S-XQCC-N16
JESD-609 code	e3	e3
length	3 mm	3 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3	3
Number of functions	1	1
Number of terminals	16	16
Actual output times	2	2
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Encapsulate equivalent code	LCC16,.12SQ,20	LCC16,.12SQ,20
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260
power supply	2.5/3.3 V	2.5/3.3 V
propagation delay (tpd)	0.84 ns	0.84 ns
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.015 ns	0.015 ns
Maximum seat height	1 mm	1 mm
Maximum supply voltage (Vsup)	3.63 V	3.63 V
Minimum supply voltage (Vsup)	2.375 V	2.375 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	3 mm	3 mm
minfmax	2000 MHz	2000 MHz

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