LPC47U32x
128 Pin Enhanced Super I/O Controller for LPC
Bus with Consumer Features and SMBus
Controller
FEATURES
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3.3 Volt Operation (5V Tolerant)
LPC Interface
Floppy Disk Controller (Supports 2 FDCs)
Multi-Mode Parallel Port
One Full Function UART
MPU-401 MIDI UART
8042 Keyboard Controller
Dual Game Port
SMBus Controller
Programmable Wakeup Event Interface
(nIO_PME Pin)
SMI Support (nIO_SMI Pin)
GPIO Pins (37)
Fan Speed Control Output
Fan Tachometer Input
ISA IRQ to Serial IRQ Conversion
XNOR Chain
PC99 and ACPI 1.0 Compliant
ISA Plug-and-Play Compatible Register Set
Intelligent Auto Power Management
2.88MB Super I/O Floppy Disk Controller
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Licensed CMOS 765B Floppy Disk
Controller
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Software and Register Compatible with
SMSC's Proprietary 82077AA
Compatible Core
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Configurable Open Drain/Push-Pull
Output Drivers
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Supports Vertical Recording Format
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16-Byte Data FIFO
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100% IBM
®
Compatibility
Detects All Overrun and Underrun
Conditions
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Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power
Consumption
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DMA Enable Logic
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Data Rate and Drive Control Registers
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480 Address, up to 15 IRQ and 3 DMA
Options
Enhanced Digital Data Separator
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2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps,
250 Kbps Data Rates
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Programmable Precompensation
Modes
Keyboard Controller
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8042 Software Compatible
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8-Bit Microcomputer
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2k Bytes of Program ROM
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256 Bytes of Data RAM
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Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface
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Asynchronous Access to Two Data
Registers and One Status Register
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Supports Interrupt and Polling Access
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8-Bit Counter Timer
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Port 92 Support
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Fast Gate A20 and KRESET Outputs
Serial Port
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One Full Function Serial Port
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High Speed NS16C550 Compatible
UART with Send/Receive 16-Byte
FIFOs
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Supports 230k and 460k Baud
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Programmable Baud Rate Generator
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Modem Control Circuitry
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480 Address and 15 IRQ Options
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Second UART for MPU-401 MIDI
Interface
Multi-Mode Parallel Port with ChiProtect™
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Standard Mode IBM PC/XT®, PC/AT®,
and PS/2™ Compatible Bidirectional
Parallel Port
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Enhanced Parallel Port (EPP)
Compatible - EPP 1.7 and EPP 1.9
(IEEE 1284 Compliant)
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IEEE 1284 Compliant Enhanced
Capabilities Port (ECP)
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ChiProtect Circuitry for Protection
Against Damage Due to Printer Power-
On
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480 Address, up to 15 IRQ and 3 DMA
Options
Pin Reduced ISA Host Interface (LPC Bus)
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Multiplexed Command, Address and
Data Bus
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8-Bit I/O Transfers
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8-Bit DMA Transfers
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16-Bit Address Qualification
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Serial IRQ Interface Compatible with
Serialized IRQ Support for PCI
Systems
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Power Management Event (nIO_PME)
Interface Pin
128 Pin QFP Package
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GENERAL DESCRIPTION
The LPC47U32x* is a 3.3V PC99 compliant
Enhanced Super I/O controller. The LPC47U32x
implements the LPC interface, a pin reduced
ISA interface which provides the same or better
performance as the ISA/X-bus with a substantial
savings in pins used. The part provides 37
GPIO pins, a dual game port interface, MPU-
401 MIDI support and ISA IRQ to serial IRQ
conversion. The part also provides a fan speed
control output and a fan tachometer input.
The LPC47U32x incorporates a keyboard
interface, SMSC's true CMOS 765B floppy disk
controller, advanced digital data separator, one
16C550A compatible UART, one MPU-401 MIDI
UART, one Multi-Mode parallel port which
includes ChiProtect circuitry plus EPP and ECP,
and Intelligent Power Management including
ACPI, SMI and PME support. The true CMOS
765B core provides 100% compatibility with IBM
PC/XT and PC/AT architectures in addition to
providing data overflow and underflow
protection. The SMSC advanced digital data
separator incorporates SMSC's patented data
separator technology, allowing for ease of
testing and use.
The on-chip UART is
compatible with the NS16C550A. The parallel
port is compatible with IBM PC/AT architecture,
as well as IEEE 1284 EPP and ECP. The
LPC47U32x incorporates sophisticated power
control circuitry (PCC). The PCC supports
multiple low power modes. The LPC47U32x
also incorporates SMBus Controller.
The LPC47U32x supports the ISA Plug-and-
Play Standard (Version 1.0a) and provides the
recommended functionality to support Windows
'95 and PC99. The I/O Address, DMA Channel
and Hardware IRQ of each logical device in the
LPC47U32x may be reprogrammed through the
internal configuration registers. There are 480
I/O address location options, a Serialized IRQ
interface, and three DMA channels. The
LPC47U32x does not require any external filter
components and is therefore easy to use and
offers lower system costs and reduced board
area. The LPC47U32x is software and register
compatible with SMSC's proprietary 82077AA
core.
IBM, PC/XT and PC/AT are registered trademarks and PS/2 is a
trademark of International Business Machines Corporation
SMSC is a registered trademark and Ultra I/O, ChiProtect, and Multi-
Mode are trademarks of Standard Microsystems Corporation
*The “x” in the part number is a designator that changes depending upon the particular BIOS used
inside the specific chip. “2” denotes AMI Keyboard BIOS and “7” denotes Phoenix 42i Keyboard
BIOS.
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TABLE OF CONTENTS
FEATURES ....................................................................................................................................... 1
GENERAL DESCRIPTION ................................................................................................................ 2
PIN CONFIGURATION...................................................................................................................... 6
DESCRIPTION OF PIN FUNCTIONS ................................................................................................ 7
Buffer Type Descriptions .............................................................................................................. 12
Pins That Require External Pullup Resistors................................................................................. 13
BLOCK DIAGRAM.......................................................................................................................... 14
3.3 VOLT OPERATION / 5 VOLT TOLERANCE.............................................................................. 15
POWER FUNCTIONALITY.............................................................................................................. 15
VCC Power.................................................................................................................................. 15
VTR Support................................................................................................................................ 15
VREF PIN.................................................................................................................................... 15
Internal PWRGOOD .................................................................................................................... 15
Indication of 32kHz Clock............................................................................................................. 16
Trickle Power Functionality .......................................................................................................... 16
Maximum Current Values............................................................................................................. 17
Power Management Events (PME/SCI) ........................................................................................ 17
FUNCTIONAL DESCRIPTION......................................................................................................... 18
Super I/O Registers ..................................................................................................................... 18
Host Processor Interface (LPC).................................................................................................... 18
LPC Interface............................................................................................................................... 19
FLOPPY DISK CONTROLLER........................................................................................................ 23
FDC Internal Registers................................................................................................................. 23
Status Register Encoding............................................................................................................. 36
DMA Transfers............................................................................................................................. 40
Controller Phases ........................................................................................................................ 40
Command Set/Descriptions ......................................................................................................... 42
Instruction Set ............................................................................................................................. 46
Data Transfer Commands............................................................................................................ 58
Control Commands...................................................................................................................... 64
Direct Support for Two Floppy Drives ........................................................................................... 71
SERIAL PORT (UART).................................................................................................................... 72
Register Description..................................................................................................................... 72
Programmable Baud Rate Generator (AND Divisor Latches DLH, DLL) ........................................ 79
Effect Of The Reset on Register File ............................................................................................ 80
FIFO Interrupt Mode Operation .................................................................................................... 80
FIFO Polled Mode Operation........................................................................................................ 80
Notes On Serial Port Operation.................................................................................................... 85
MPU-401 MIDI UART ...................................................................................................................... 86
Overview ..................................................................................................................................... 86
Host Interface .............................................................................................................................. 87
MPU-401 Command Controller .................................................................................................... 90
MIDI UART .................................................................................................................................. 91
MPU-401 Configuration Registers ................................................................................................ 92
PARALLEL PORT........................................................................................................................... 93
IBM XT/AT Compatible, Bi-Directional and EPP Modes ................................................................ 94
EPP 1.9 Operation....................................................................................................................... 96
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EPP 1.7 Operation....................................................................................................................... 97
Extended Capabilities Parallel Port............................................................................................... 99
Vocabulary .................................................................................................................................100
ECP Implementation Standard....................................................................................................101
PARALLEL PORT FLOPPY DISK CONTROLLER .........................................................................112
FDC on Parallel Port Pin .............................................................................................................117
POWER MANAGEMENT ...............................................................................................................114
FDC Power Management ............................................................................................................114
DSR From Powerdown ...............................................................................................................114
Wake Up From Auto Powerdown ................................................................................................114
Register Behavior .......................................................................................................................114
Pin Behavior ...............................................................................................................................115
UART Power Management..........................................................................................................117
Parallel Port................................................................................................................................117
MPU-401 Power Management.....................................................................................................117
SERIAL IRQ...................................................................................................................................118
ISA IRQ to Serial IRQ Conversion Capability ..............................................................................122
8042 KEYBOARD CONTROLLER DESCRIPTION .........................................................................123
Keyboard Interface......................................................................................................................124
External Keyboard and Mouse Interface ......................................................................................125
Keyboard Power Management ....................................................................................................125
Interrupts ....................................................................................................................................126
Memory Configurations...............................................................................................................126
Register Definitions.....................................................................................................................126
External Clock Signal..................................................................................................................127
Default Reset Conditions.............................................................................................................127
Latches On Keyboard and Mouse IRQs.......................................................................................130
Keyboard and Mouse PME Generation........................................................................................131
GENERAL PURPOSE I/O ..............................................................................................................133
GPIO Pins ..................................................................................................................................133
Description .................................................................................................................................134
GPIO Control..............................................................................................................................135
GPIO Operation..........................................................................................................................137
GPIO PME and SMI Functionality ...............................................................................................138
Either Edge Triggered Interrupts .................................................................................................140
LED Functionality .......................................................................................................................140
Watch Dog Timer .......................................................................................................................140
SYSTEM MANAGEMENT INTERRUPT (SMI) ................................................................................142
SMI Registers .............................................................................................................................142
ACPI Support Register for SMI Generation..................................................................................143
PME SUPPORT .............................................................................................................................144
Wake On Specific Key Option .....................................................................................................146
FAN SPEED CONTROL AND MONITORING .................................................................................147
Fan Speed Control......................................................................................................................147
Fan Tachometer Input.................................................................................................................148
SECURITY FEATURE ....................................................................................................................153
GPIO Device Disable Register Control ........................................................................................153
Device Disable Register ..............................................................................................................153
GAME PORT LOGIC .....................................................................................................................154
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SMBUS CONTROLLER .................................................................................................................157
Overview ....................................................................................................................................157
Configuration Registers...............................................................................................................157
Runtime Registers ......................................................................................................................157
Pin Multiplexing ..........................................................................................................................164
SMBus Timeouts ........................................................................................................................164
SMBus Timeout ..........................................................................................................................165
RUNTIME REGISTERS ..................................................................................................................166
Runtime Registers Block Summary.............................................................................................166
Runtime Registers Block Description...........................................................................................169
CONFIGURATION .........................................................................................................................201
OPERATIONAL DESCRIPTION .....................................................................................................223
Maximum Guaranteed Ratings....................................................................................................223
Normal Operation .......................................................................................................................223
DC Electrical Characteristics.......................................................................................................223
TIMING DIAGRAMS ......................................................................................................................227
ECP Parallel Port Timing ............................................................................................................238
PACKAGE OUTLINE .....................................................................................................................248
Board Test Mode ........................................................................................................................249
80 Arkay Drive
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