1210J0630682JAR datasheet, PDF

1210J0630682JAR: DescriptionCeramic Capacitor, Multilayer, Ceramic, 63V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.0068uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT; CategoryPassive components capacitor; File Size3MB，9 Pages; ManufacturerSyfer; Environmental Compliance

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1210J0630682JAR Overview

Ceramic Capacitor, Multilayer, Ceramic, 63V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.0068uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Syfer
package instruction	, 1210
Reach Compliance Code	compli
ECCN code	EAR99
capacitance	0.0068 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	2 mm
JESD-609 code	e3
length	3.2 mm
Manufacturer's serial number	1210
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	TR, 13 INCH
positive tolerance	5%
Rated (DC) voltage (URdc)	63 V
Guideline	AEC-Q200
series	AEC-Q200
size code	1210
surface mount	YES
Temperature characteristic code	C0G
Temperature Coefficient	-/+30ppm/Cel ppm/°C
Terminal surface	Matte Tin (Sn) - with Nickel (Ni) barrie
Terminal shape	WRAPAROUND
width	2.5 mm

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AEC-Q200

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