IS61LSCS51236-300B datasheet, PDF

Datasheet> All Categories > storage> storage> IS61LSCS51236-300B

IS61LSCS51236-300B: DescriptionStandard SRAM, 512KX36, 1.8ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209; Categorystorage storage; File Size174KB，33 Pages; ManufacturerIntegrated Silicon Solution ( ISSI )

Download Datasheet Parametric Compare View All

IS61LSCS51236-300B Overview

Standard SRAM, 512KX36, 1.8ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209

IS61LSCS51236-300B Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	BGA
package instruction	14 X 22 MM, 1 MM PITCH, BGA-209
Contacts	209
Reach Compliance Code	compli
ECCN code	3A991.B.2.A
Maximum access time	1.8 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B209
JESD-609 code	e0
length	22 mm
memory density	18874368 bi
Memory IC Type	STANDARD SRAM
memory width	36
Humidity sensitivity level	3
Number of functions	1
Number of terminals	209
word count	524288 words
character code	512000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX36
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	2.2 mm
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	14 mm

Preview

Download Datasheet

View All

IS61LSCS25672

IS61LSCS51236

RAM 256K X 72, 512K X 36

18MB SYNCHRONOUS SRAM

FEATURES

• JEDEC SigmaRam pinout and package standard

• Single 1.8V power supply (V

): 1.7V (min)

to 1.9V (max)

• Dedicated output supply voltage (V

DDQ

): 1.8V

or 1.5V typical

• LVCMOS-compatible I/O interface

• Common data I/O pins (DQs)

• Single Data Rate (SDR) data transfers

• Late Write

Pipelined

(PL) read operations

• Burst and non-burst read and write operations,

selectable via dedicated control pin (ADV)

• Internally controlled Linear Burst address

sequencing during burst operations

• Burst length of 2, 3, or 4, with automatic address

wrap

• Full read/write coherency

• Byte write capability

• Two cycle deselect

• Single-ended input clock (CLK)

• Data-referenced output clocks (CQ/,

CQ)

• Selectable output driver impedance via dedicated

control pin (ZQ)

• Echo clock outputs track data output drivers

• Depth expansion capability (2 or 4 banks) via

programmable chip enables (E2, E3, EP2, EP3)

• JTAG boundary scan (subset of IEEE standard

1149.1)

• 209 Ball (11x19), 1mm pitch, 14mm x 22mm Ball

Grid Array (BGA) package

ISSI

ADVANCE INFORMATION

NOVEMBER 2002

Bottom View

209-Ball, 14 mm x 22 mm BGA

1 mm Ball Pitch, 11 x 19 Ball Array

SIGMARAM FAMILY OVERVIEW

The IS61LSCS series

RAMs are built in compliance with

the SigmaRAM pinout standard for synchronous SRAMs.

The implementations are 18,874,368-bit (18Mb) SRAMs.

These are the first in a family of wide, very low voltage CMOS

I/O SRAMs designed to operate at the speeds needed to

implement economical high performance networking

systems.

ISSI’s

RAMs are offered in a number of configurations that

emulate other synchronous SRAMs, such as Burst RAMs,

NBT RAMs, Late Write, or Double Data Rate (DDR) SRAMs.

The logical differences between the protocols employed by

these RAMs hinge mainly on various combinations of

address bursting, output data registering and write cueing.

RAMs allow a user to implement the interface protocol best

suited to the task at hand.

This specific product is Common I/O, SDR, Pipelined, and

in the family is identified as 1x1Lp.

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any

published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com —

1-800-379-4774

ADVANCE INFORMATION

11/11/02

Rev. 00B

IS61LSCS51236-300B Related Products

	IS61LSCS51236-300B	IS61LSCS25672-300B	IS61LSCS25672-250B	IS61LSCS25672-333B	IS61LSCS51236-250B	IS61LSCS51236-333B
Description	Standard SRAM, 512KX36, 1.8ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209	Standard SRAM, 256KX72, 1.8ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209	Standard SRAM, 256KX72, 2.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209	Standard SRAM, 256KX72, 1.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209	Standard SRAM, 512KX36, 2.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209	Standard SRAM, 512KX36, 1.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA
package instruction	14 X 22 MM, 1 MM PITCH, BGA-209	14 X 22 MM, 1 MM PITCH, BGA-209	14 X 22 MM, 1 MM PITCH, BGA-209	14 X 22 MM, 1 MM PITCH, BGA-209	14 X 22 MM, 1 MM PITCH, BGA-209	14 X 22 MM, 1 MM PITCH, BGA-209
Contacts	209	209	209	209	209	209
Reach Compliance Code	compli	compliant	compliant	compliant	compliant	compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	1.8 ns	1.8 ns	2.1 ns	1.6 ns	2.1 ns	1.6 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B209	R-PBGA-B209	R-PBGA-B209	R-PBGA-B209	R-PBGA-B209	R-PBGA-B209
JESD-609 code	e0	e0	e0	e0	e0	e0
length	22 mm	22 mm	22 mm	22 mm	22 mm	22 mm
memory density	18874368 bi	18874368 bit	18874368 bit	18874368 bit	18874368 bit	18874368 bit
Memory IC Type	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM
memory width	36	72	72	72	36	36
Humidity sensitivity level	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1
Number of terminals	209	209	209	209	209	209
word count	524288 words	262144 words	262144 words	262144 words	524288 words	524288 words
character code	512000	256000	256000	256000	512000	512000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	512KX36	256KX72	256KX72	256KX72	512KX36	512KX36
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	BGA	BGA	BGA	BGA	BGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.2 mm	2.2 mm	2.2 mm	2.2 mm	2.2 mm	2.2 mm
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm

Recommended Resources

Hysteresis mode power factor correction circuit

Gypsophila lantern controller circuit

Motorcycle voltage regulator to prevent battery overcharging

Computer motherboard circuit diagram 440BX_16

Computer motherboard circuit diagram 815 2_39

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components