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RD38F2030W0ZBQ2

Description
Memory Circuit, Flash+PSRAM+SRAM, 4MX16, CMOS, PBGA88, 8 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, STACK, CSP-88
Categorystorage    storage   
File Size706KB,54 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
Download Datasheet Parametric View All

RD38F2030W0ZBQ2 Overview

Memory Circuit, Flash+PSRAM+SRAM, 4MX16, CMOS, PBGA88, 8 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, STACK, CSP-88

RD38F2030W0ZBQ2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIntel
Parts packaging codeBGA
package instructionTFBGA, BGA88,8X12,32
Contacts88
Reach Compliance Codecompli
Maximum access time70 ns
Other featuresCONTAINS 16 MBIT PSRAM, ALSO CONTAINS 64 MBIT FLASH
JESD-30 codeR-PBGA-B88
JESD-609 codee0
length10 mm
memory density67108864 bi
Memory IC TypeMEMORY CIRCUIT
memory width16
Mixed memory typesFLASH+PSRAM+SRAM
Number of functions1
Number of terminals88
word count4194304 words
character code4000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-25 °C
organize4MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Encapsulate equivalent codeBGA88,8X12,32
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply1.8,3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.000005 A
Maximum slew rate0.055 mA
Maximum supply voltage (Vsup)1.95 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width8 mm
Intel
®
Wireless Flash Memory
(W18/W30 SCSP)
32WQ and 64WQ Family with Asynchronous RAM
Datasheet
Product Features
Device Architecture
— Flash Density: 32-Mbit, 64-Mbit
— Async PSRAM Density: 8-, 16-, 32-
Mbit; Async SRAM Density: 4-, 8-, 16-
Mbit
— Top, Bottom or Dual flash parameter
configuration
Device Voltage
— Flash V
CC
= 1.8 V; Flash V
CCQ
= 1.8 V
or 3.0 V
— RAM V
CC
= 3.0 V; RAM V
CCQ
= 1.8 V
or 3.0 V
Device Packaging
— 88 balls (8 x 10 active ball matrix);
Area: 8x10 mm; Height: 1.2 mm to 1.4
mm
PSRAM Performance
— 70 ns initial access, 25 ns async page
reads at 1.8 V I/O
— 70 ns initial access async PSRAM at
1.8V I/O
— 88 ns initial access, 30 ns async page
reads at 1.8 V I/O
— 85 ns initial access, 35 ns async page
reads at 3.0 V I/O
— 70 ns initial access, 25 ns async page
reads at 3.0 V I/O
SRAM Performance
— 70 ns initial access at 1.8 V or 3.0 V I/O
Flash Performance
— 65 ns initial access at 1.8 V I/O
— 70 ns initial access at 3.0 V I/O
— 25 ns async page at 1.8 V or 3.0 V I/O
— 14 ns sync reads (t
CHQV
) at 1.8 V I/O
— 20 ns sync reads (t
CHQV
) at 3.0 V I/O
— Enhanced Factory Programming:
3.10 µs/Word (Typ)
Flash Architecture
— Read-While-Write/Erase
— Asymmetrical blocking structure
— 4-KWord parameter blocks (Top or
Bottom); 32-KWord main blocks
— 4-Mbit partition size
— 128-bit One-Time Programmable (OTP)
Protection Register
— Zero-latency block locking
— Absolute write protection with block
lock using F-VPP and F-WP#
Flash Software
— Intel
®
Flash Data Integrator (FDI) and
Common Flash Interface (CFI)
Quality and Reliability
— Extended Temperature: –25 °C to +85 °C
— Minimum 100K flash block erase cycle
— 90 nm ETOX™ IX flash technology
— 130 nm ETOX™ VIII flash technology
The Intel
®
Wireless Flash Memory (W18/W30 SCSP) family offers various flash plus static
RAM combinations in a common package footprint. The flash memory features 1.8 V low-
power operations with flexible, multi-partition, dual-operation Read-While-Write / Read-While-
Erase, asynchronous, and synchronous reads. This SCSP device integrates up to two flash die,
one PSRAM die, and one SRAM die in a low-profile package compatible with other SCSP
families with QUAD+ ballout.
Order Number: 251407, Revision: 010
18-Oct-2005

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