Data Sheet No. PD94254
IRU1246 / IRU1247-18 / IRU1247-25
2A FIXED AND ADJUSTABLE
DUAL VOLTAGE REGULATOR
PRELIMINARY DATA SHEET
FEATURES
Low Dropout Voltage
Fast Transient Response
Built-In Thermal Shutdown
Output Current Limiting
D-Pak, Ultra Thin-Pak and SOIC
Fixed 3.3V and Adjustable, or Fixed 3.3V and 1.8V,
or Fixed 3.3V and 2.5V
DESCRIPTION
The IRU1246/47 family of voltage regulators contain two
integrated, low dropout linear voltage regulators in three
different packages, such as new 5-Pin Ultra Thin-Pak
surface mount, 5-Pin D-Pak and 8-Pin SOIC. The
IRU1246 provides 3.3V fixed and adjustable outputs. The
IRU1247-18 provides fixed 3.3V and 1.8V. The IRU1247-
25 provides fixed 3.3V and 2.5V output. These products
are stable with both Ceramic and Tantalum output ca-
pacitors. The adjustable output provides a voltage from
1.25V and up using a simple resistor divider. The input
supply for both regulators is supplied from a single 5V
supply. Each regulator is capable of 2 amps continuous
load current. Both outputs, for each device, are current
limit protected as well as having a thermal shutdown
that protects the device from excessive temperature.
APPLICATIONS
Motherboard with Multiple Supplies
Hard Disk Drivers, CD-ROMs, DVDs
ADSL and Cable Modems
High Efficiency Linear Regulators
TYPICAL APPLICATION
3.3V
Vout1
C2
4.7uF
Y5V Ceramic
5
4
3
2
1
C1
10uF
Tant
R1
100
1%
R2
100
1%
U1
IRU1246
Vout2
Gnd
Vadj
Vin
2.5V
C3
4.7uF
Y5V Ceramic
Vin
Vo = Vref
×o
1 +
o
R1
p
R2
Figure 1 - Typical application of IRU1246 in 5-Pin TO-252 (D-Pak) package.
Note:
All caps must be located as close to the pins as physically possible using a plane connection.
PACKAGE ORDER INFORMATION
T
J
(°C)
0 To 150
0 To 150
0 To 150
Rev. 1.6
07/13/01
5-PIN
TO-252 (D-Pak)
IRU1246CD
IRU1247-18CD
IRU1247-25CD
5-PIN TO-263
8-PIN PLASTIC
Ultra Thin-Pak (P) SOIC POWER (S)
IRU1246CP
IRU1246CS
IRU1247-18CP
IRU1247-18CS
IRU1247-25CP
IRU1247-25CS
OUTPUT
VOLTAGE #1
3.3V Fixed
3.3V Fixed
3.3V Fixed
OUTPUT
VOLTAGE #2
Adjustable
1.8V Fixed
2.5V Fixed
1
IRU1246 / IRU1247-18 / IRU1247-25
ABSOLUTE MAXIMUM RATINGS
Input Voltage (V
IN
) .................................................... 7V
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 150°C
PACKAGE INFORMATION
5-PIN PLASTIC TO-252 (D-Pak)
FRONT VIEW
5
4
3
2
1
FRONT VIEW
5-PIN ULTRA THIN-PAK (P)
FRONT VIEW
FRONT VIEW
5
4
3
2
1
8-PIN PLASTIC POWER SOIC (S)
TOP VIEW
TOP VIEW
8 Gnd
7 Gnd
6 Gnd
5 Gnd
Vin 1
NC 2
Vout1 3
Vout2 4
8 Gnd
7 Gnd
6 Gnd
5 Gnd
Vout2
Vout1
Gnd
NC
Vin
Vout1
Vout2
Gnd
Vadj
Vin
5
4
3
2
1
Vout2
Vout1
Gnd
NC
Vin
Vout1
Vout2
Gnd
Vadj
Vin
5
4
3
2
1
Vin 1
Vadj 2
Vout2 3
Vout1 4
IRU1246
IRU1247
IRU1246
IRU1247
IRU1246
IRU1247
θ
JA
=358C/W with 1" Copper area
θ
JA
=25$C/W with 1" Copper area
θ
JA
=55°C/W for 1" Sq pad
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vin=5.0V, Cin=Cout=4.7µF. Typical values refer to
T
J
=25°C. I
FL1
=2A, I
FL2
=2A
PARAMETER
SYM
Output Voltage #1
Vo
1
Output Voltage #1
Vo
1
Output Voltage #2(IRU1246)
Vo
2
Output Voltage #2(IRU1246)
Vo
2
Output Voltage #2(IRU1247-18) Vo
2
Output Voltage #2(IRU1247-18) Vo
2
Output Voltage #2(IRU1247-25) Vo
2
Output Voltage #2(IRU1247-25) Vo
2
Line Regulation
Reg
LINE
Load Regulation
Reg
LOAD
Dropout Voltage (Output #1)
V
DO1
Dropout Voltage (Output #2)
V
DO2
Current Limit (Output #1)
Io
L1
Current Limit (Output #2)
Io
L2
Minimum Load Current
(Output #1)
Io
1(MIN)
Minimum Load Current
(Output #2)
Io
2(MIN)
Thermal Regulation
Reg
therm
Ripple Rejection
(Vcc to Output #1)
PSRR
1
Ripple Rejection
(Vcc to Output #2)
PSRR
2
Temperature Stability
Stab
TEMP
Long Term Stability
Stab
LONG
RMS Output Noise
Vn
Vin Quiescent current
I
Q1
TEST CONDITION
Io
2
=10mA, T
J
=25°C
Io
1
=10mA, T
J
=0 to 125°C
Io
1
=10mA, T
J
=25°C, Vo=Vadj
Io
1
=10mA, T
J
=0 to 125°C, Vo=Vadj
Io
1
=10mA, T
J
=25°C
Io
1
=10mA, T
J
=0 to 125°C
Io
1
=10mA, T
J
=25°C
Io
1
=10mA, T
J
=0 to 125°C
Io=10mA, Vcc ±5%
Note 1, 10mA<Io<I
FL
Note 2, Io
1
= I
FL1
Note 2, Io
2
= I
FL2
∆Vo
1
=10% below regulation
∆Vo
2
=10% below regulation
Note 3, 5
Note 3, 5
Note 5, 30ms pulse, Io=I
FL
Note 5,100Hz<f<100KHz,Io=I
FL1
/10
Note 5,100Hz<f<100KHz, Io=I
FL2
/10
Note 4, 5, Io =10mA
Note 5, T
J
=125°C, 1000Hrs
Note 5, 10Hz<f<10KHz
Io
1
=Io
2
=0
MIN
3.230
3.200
1.238
1.225
1.782
1.764
2.475
2.450
TYP
3.300
3.300
1.250
1.250
1.800
1.800
2.500
2.500
0.2
0.4
1.1
1.1
MAX
3.370
3.400
1.262
1.275
1.818
1.836
2.525
2.550
UNITS
V
V
V
V
V
V
V
V
%Vo
%Vo
V
V
A
A
mA
mA
%/Watt
dB
dB
%Vo
%Vo
%Vo
mA
1.3
1.3
2.1
2.1
5
5
0.1
40
40
0.5
0.3
0.003
10
2
Rev. 1.6
07/13/01
IRU1246 / IRU1247-18 / IRU1247-25
Note 1:
Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data.
Note 2:
Dropout voltage is defined as the minimum differential voltage between Vin and Vout required to maintain
regulation at Vout. It is measured when the output voltage drops 1% below its nominal value.
Note 3:
Minimum load current is defined as the minimum current required at the output in order for the output
voltage to maintain regulation.
Note 4:
Temperature stability is the change in output from nominal over the operating temperature range.
Note 5:
Guaranteed by design, but not tested in production.
PIN DESCRIPTIONS
IRU1246
PIN # PIN SYMBOL
1
Vin
PIN DESCRIPTION
The power input pin of the regulator. Typically a large storage capacitor is connected from
this pin to ground to insure that the input voltage does not sag below the minimum dropout
voltage during the load transient response. This pin must always be higher than both Vout
pins by the amount of the dropout voltage in order for the device regulate properly.
A resistor divider from this pin to Vout2 (pin4) and ground sets the output voltage.
This pin is connected to ground. It is also the TAB of the Ultra Thin-Pak package.
The output #2 (adjustable) of the regulator. A minimum of 4.7µF capacitor must be con-
nected from this pin to ground to insure stability.
The output #1 (3.3V) of the regulator. A minimum of 4.7µF capacitor must be connected
from this pin to ground to insure stability.
2
3
4
5
Vadj
Gnd
Vout2
Vout1
IRU1247-18, IRU1247-25
PIN # PIN SYMBOL
1
Vin
PIN DESCRIPTION
The power input pin of the regulator. Typically a large storage capacitor is connected from
this pin to ground to insure that the input voltage does not sag below the minimum dropout
voltage during the load transient response. This pin must always be higher than both Vout
pins by the amount of the dropout voltage in order for the device to regulate properly.
No connection.
This pin is connected to ground. It is also the TAB of the Ultra Thin-Pak package.
The output #1 (1.8V for 1247-18 and 2.5V for 1247-25) of the regulator. A minimum of
4.7µF capacitor must be connected from this pin to ground to insure stability.
The output #2 (3.3V) of the regulator. A minimum of 4.7µF capacitor must be connected
from this pin to ground to insure stability.
2
3
4
5
NC
Gnd
Vout1
Vout2
Rev. 1.6
07/13/01
3
IRU1246 / IRU1247-18 / IRU1247-25
APPLICATION INFORMATION
Thermal
The following thermal design check illustrates the method
used to calculate the maximum junction temperature of
the regulator.
Power Flex Package (Ultra Thin-Pak)
R
THJA
= 25°C/W (Note 1)
T
A
= 45°C
V
5
= 5V
I
2.5
= 0.30A
I
3.3
= 0.80A
V
2.5
= 2.5V
V
3.3
= 3.3V
P
D
= (V
5
-V
3.3
)
×
I
3.3
+ (V
5
-V
2.5
)
×
I
2.5
P
D
= (5 -3.3)
×
0.8 + (5-2.5)
×
0.3 = 2.11W
∆T
= P
D
×
R
THJA
= 2.11
×
25 = 53°C
T
J
= T
A
+
∆T
= 45 + 53 = 98°C
T
J
= 98°C
Note 1:
This thermal impedance is for a four-layer board
mounted on a minimum of one inch square area. It is
possible to further reduce this by mounting the device
close to other thermally conductive elements such as
mounting screws.
Layout Consideration
The IRU1246/1247-xx like many other high speed regu-
lators requires that the output capacitors to be close to
the device for stability reasons. For power consideration,
a ground plane pad of approximately one inch square
pad on the component side must be dedicated to the
device where all ground pins are connected to dissipate
the power. If multilayer board is used, it is recommended
that the inner layers of the board are also dedicated to
the size of the pad for better thermal characteristics.
4
Rev. 1.6
07/13/01
IRU1246 / IRU1247-18 / IRU1247-25
TYPICAL APPLICATION
3.3V
5
6
7
8
Gnd
Gnd
Gnd
Gnd
Vout1
4
C2
4.7uF
Y5V Ceramic
U1
Vout2
3
IRU1246
Vadj
2
Vin
2.5V
R1
100
1%
R2
100
1%
C3
4.7uF
Y5V Ceramic
1
C1
10uF
Tant
Vin
Note:
All caps must be located as
close to the pins as physically pos-
sible using a plane connection.
Figure 2 - Typical application of IRU1246 in power 8-Pin SOIC package.
3.3V
Vout1
5
4
3
2
1
C1
10uF
Tant
R1
100, 1%
R2
100, 1%
C3
4.7uF
Y5V Ceramic
U1
IRU1246
Vout2
Gnd
Vadj
Vin
2.5V
C2
4.7uF
Y5V Ceramic
Vin
Note:
All caps must be located as
close to the pins as physically pos-
sible using a plane connection.
Figure 3 - Typical application of IRU1246 in 5-Pin Ultra Thin-Pak package.
Rev. 1.6
07/13/01
5
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